199598 ⎘
Digital stores characterised by arrangements of cells having volatile and non-volatile storage properties for back-up when the power is down in which the volatile element is a SRAM cell and the nonvolatile element is a magnetic RAM [MRAM] element or ferromagnetic cell
LOGIC DRIVE USING STANDARD COMMODITY PROGRAMMABLE LOGIC IC CHIPS COMPRISING NON-VOLATILE RANDOM ACCESS MEMORY CELLS
#2LOGIC DRIVE USING STANDARD COMMODITY PROGRAMMABLE LOGIC IC CHIPS COMPRISING NON-VOLATILE RANDOM ACCESS MEMORY CELLS
#3LOGIC DRIVE USING STANDARD COMMODITY PROGRAMMABLE LOGIC IC CHIPS COMPRISING NON-VOLATILE RANDOM ACCESS MEMORY CELLS
#4NON-VOLATILE STATIC RANDOM ACCESS MEMORY (NVSRAM) WITH MULTIPLE MAGNETIC TUNNEL JUNCTION CELLS
#5SEMICONDUCTOR INTEGRATED CIRCUIT AND ELECTRONIC DEVICE
#6NONVOLATILE SRAM
#7ELECTRONIC CIRCUIT
#8LOGIC DRIVE USING STANDARD COMMODITY PROGRAMMABLE LOGIC IC CHIPS COMPRISING NON-VOLATILE RANDOM ACCESS MEMORY CELLS
#9NON-VOLATILE STATIC RANDOM ACCESS MEMORY (NVSRAM) WITH MULTIPLE MAGNETIC TUNNEL JUNCTION CELLS
#10LOGIC DRIVE USING STANDARD COMMODITY PROGRAMMABLE LOGIC IC CHIPS COMPRISING NON-VOLATILE RANDOM ACCESS MEMORY CELLS
#11Non-volatile storage circuit
#12LOGIC DRIVE USING STANDARD COMMODITY PROGRAMMABLE LOGIC IC CHIPS COMPRISING NON-VOLATILE RANDOM ACCESS MEMORY CELLS
#13Non-volatile static random access memory (nvSRAM) with multiple magnetic tunnel junction cells
#14Nonvolatile SRAM
#15Logic drive using standard commodity programmable logic IC chips comprising non-volatile random access memory cells
#16Electronic bistable circuit with third voltage to retain memory data
#17Logic drive using standard commodity programmable logic IC chips comprising non-volatile random access memory cells
#18Logic drive using standard commodity programmable logic IC chips comprising non-volatile random access memory cells
#19Non-volatile static random access memory (nvSRAM) with multiple magnetic tunnel junction cells
#20Method, system and device for integration of volatile and non-volatile memory bitcells
#21Nonvolatile SRAM
#22Non-volatile static random access memory (nvSRAM) with multiple magnetic tunnel junction cells
#23Semiconductor circuit and semiconductor circuit system to suppress disturbance in the semiconductor circuit
#24Semiconductor circuit and semiconductor circuit system
#25Non-volatile static random access memory with independently accessible non-volatile bit cell and method of operating the same
#26Logic drive using standard commodity programmable logic IC chips comprising non-volatile random access memory cells
#27Semiconductor device
#28Magnetic attack detection in a magnetic random access memory (MRAM)
#29Integrated circuit devices and methods of manufacturing same
#30Memory structure for artificial intelligence (AI) applications
#31Logic drive using standard commodity programmable logic IC chips comprising non-volatile random access memory cells
#32Logic drive using standard commodity programmable logic IC chips comprising non-volatile random access memory cells
#33Memory circuit and semiconductor device
#34Backup and/or restore of a memory circuit
#35Semiconductor device
#36Magnetic memory device, method for manufacturing the same, and substrate treating apparatus
#37Logic drive using standard commodity programmable logic IC chips comprising non-volatile random access memory cells
#38Memory circuit having non-volatile memory cell and methods of using
#39Nonvolatile digital computing with ferroelectric FET
#40Integrated circuit devices
#41Semiconductor circuit and semiconductor circuit system
#42Method, system and device for integration of volatile and non-volatile memory bitcells
#43Logic drive using standard commodity programmable logic IC chips comprising non-volatile radom access memory cells
#44METHODS AND APPARATUS FOR MEMORY CELLS THAT COMBINE STATIC RAM AND NON VOLATILE MEMORY
#45Apparatuses and methods for calibrating sense amplifiers in a semiconductor memory
#46Logic drive using standard commodity programmable logic IC chips comprising non-volatile random access memory cells
#47Hybrid configuration memory cell
#48Memory device and memory system
#49Semiconductor circuit, driving method, and electronic apparatus
#50Devices and systems to reduce the number of memory type range registers (MTRRS) used to map processor-associated memory
#51Semiconductor circuit, method of driving semiconductor circuit, and electronic apparatus
#52Apparatuses and methods for calibrating sense amplifiers in a semiconductor memory
#53Integrated circuits with programmable non-volatile resistive switch elements
#54Semiconductor circuit, driving method, and electronic apparatus
#55Nonvolatile digital computing with ferroelectric FET
#56SRAM bitline equalization using phase change material
#57Semiconductor device having a volatile element and a plurality of non-volatile elements
#58Non-volatile SRAM cell using resistive memory elements
#59Integrated circuit devices including separate memory cells on separate regions of individual substrate
#60Non-volatile memory circuit
#61Electronic circuit board
#62Method of writing contents in memory during a power up sequence using a dynamic redundancy register in a memory device
#63Sense path circuitry suitable for magnetic tunnel junction memories
#64Semiconductor device, electronic component, and electronic device
#65Memory mapping
#66Memory circuit with a bistable circuit and a non-volatile element
#67METHOD AND DEVICE TO DISTRIBUTE CODE AND DATA STORES BETWEEN VOLATILE MEMORY AND NON-VOLATILE MEMORY
#68Direct interface between SRAM and non-volatile memory providing space efficiency by matching pitch in both memories
#69Zero leakage, high noise margin coupled giant spin hall based retention latch
#70Sense path circuitry suitable for magnetic tunnel junction memories
#71Non-volatile SRAM with multiple storage states
#72Structure for thermally assisted MRAM
#733D MRAM with through silicon vias or through silicon trenches magnetic shielding
#74Transistor using piezoresistor as channel, and electronic circuit
#75Systems and methods for SRAM with backup non-volatile memory that includes MTJ resistive elements
#76Memory provided with associated volatile and non-volatile memory cells
#77Method and circuit for programming non-volatile memory cells of a volatile/non-volatile memory array
#78Non-volatile flip-flop with enhanced-scan capability to sustain sudden power failure
#79UNIFIED NON-VOLATILE MEMORY AND ELECTRONIC APPARATUS APPLYING THE NON-VOLATILE MEMORY
#80Non-volatile static random access memory
#81Storage device including magnetic elements
#82System and method for polling the status of memory devices
#83INDIRECTION DATA STRUCTURES IMPLEMENTED AS RECONFIGURABLE HARDWARE
#84Memory cell with retention using resistive memory
#85Nonvolatile variable resistance memory circuit which includes magnetic tunnel junction element
#86Memory cell and storage device
#87EVENT TRIGGERED ERASURE FOR DATA SECURITY
#88MEMORY CELL WITH RETENTION USING RESISTIVE MEMORY
#89SYSTEM AND METHOD OF COUNTING PROGRAM/ERASE CYCLES
#90Semiconductor system for implementing an ising model of interaction
#91Memory cell with non-volatile data storage
#92Non-volatile memory cell
#93Data holding circuit including latch circuit and storing circuit having MTJ elements and data recovery method
#94Resistive memory write operation with merged reset
#95Information processing apparatus, information processing method, and storage medium
#96Data generating device and data generating method
#97Non-volatile SRAM with multiple storage states
#98Storage device, memory cell, and data writing method
#99Variable read delay system
#100Non-volatile memory using bi-directional resistive elements
#101Structure for thermally assisted MRAM
#102Memory device
#103SEMICONDUCTOR MEMORY DEVICE
#104Electronic device including a semiconductor memory unit that includes cell mats of a plurality of planes vertically stacked
#105Semiconductor device comprising memory circuit
#106Single phase GSHE-MTJ non-volatile flip-flop
#107Three-phase GSHE-MTJ non-volatile flip-flop
#108Computer system with physically-addressable solid state disk (SSD) and a method of addressing the same
#109Memory circuit
#110Memory circuit provided with bistable circuit and non-volatile element
#111Non-volatile memory device
#112Processor
#113Method of pinning domain walls in a nanowire magnetic memory device
#114Integrated circuit
#115Non-volatile memory, writing method for the same, and reading method for the same
#116Semiconductor device with volatile and non-volatile memories to retain data during power interruption
#117Processor system having variable capacity memory
#118Memory cell with volatile and non-volatile storage
#119System and method for polling the status of memory devices
#120Semiconductor device and control method of the same
#121Magnetic tunneling junction non-volatile register with feedback for robust read and write operations
#122Apparatus and method of converting address and data of memory in a terminal
#123Memory cell with volatile and non-volatile storage
#124Mobile device using secure spin torque transfer magnetic random access memory (STTMRAM)
#125Low sensing current non-volatile flip-flop
#126Non-volatile flip-flop
#127Semiconductor memory device
#128Method and apparatus for providing complimentary state retention
#129Semiconductor integrated circuit and processor
#130Magnetoresistive device and nonvolatile memory with the same
#131Semiconductor device
#132Nonvolatile latch circuit
#133Spintronic devices with integrated transistors
#134Nonvolatile memory circuit using spin MOS transistors
#135Non-volatile static ram cell circuit and timing method
#136Spintronic devices with integrated transistors
#137Nonvolatile SRAM/latch circuit using current-induced magnetization reversal MTJ
#138Semiconductor integrated circuit
#139Nonvolatile memory circuit using spin MOS transistors
#140Nonvolatile logic circuit, integrated circuit including the nonvolatile logic circuit, and method of operating the integrated circuit
#141Non-volatile logic devices using magnetic tunnel junctions
#142Nonvolatile latch circuit
#143SEMICONDUCTOR MEMORY DEVICE PROVIDED WITH RESISTANCE CHANGE ELEMENT
#144nvSRAM having variable magnetic resistors
#145SEMICONDUCTOR DEVICE
#146Non-volatile state retention latch
#147Integrating nonvolatile memory capability within SRAM devices
#148Storage apparatus including non-volatile SRAM
#149Semiconductor integrated circuit
#150Non-volatile SRAM cell
#151DESIGN STRUCTURE FOR INTEGRATING NONVOLATILE MEMORY CAPABILITY WITHIN SRAM DEVICES
#152Apparatus and method for integrating nonvolatile memory capability within SRAM devices
#153Spintronic devices with integrated transistors
#154Nonvolatile latch circuit and nonvolatile flip-flop circuit
#155Adaptive algorithm for MRAM manufacturing
#156Adaptive algorithm for MRAM manufacturing
#157Adaptive algorithm for MRAM manufacturing
#158Architectures for CPP ring shaped (RS) devices
#159Spintronic devices with integrated transistors
#160Nonvolatile memory for logic circuits
#161Adaptive algorithm for MRAM manufacturing
#162Nonvolatile memory device efficiently changing functions of field programmable gate array at high speed
#163Magnetic random access memory element
#164MRAM in-pixel memory for display devices
#165Composite storage circuit and semiconductor device having the same composite storage circuit
#166Semiconductor device saving data in non-volatile manner during standby
#167Memories and memory circuits
#168Magnetic memory device
#169Nonvolatile sequential machines
#170Transistor noise tolerant, non-volatile (NV) resistance element-based static random access memory (SRAM) physically unclonable function (PUF) circuits, and related systems and methods
#171Neuromorphic memory device
#172Physically unclonable function (PUF) memory employing static random access memory (SRAM) bit cells with added passive resistance to enhance transistor imbalance for improved PUF output reproducibility
#173Volatile latch circuit with tamper resistant non-volatile latch backup
#174Nonvolatile static random access memory (NVSRAM) system having a static random access memory (SRAM) array and a resistive memory array
#175Non-volatile static random access memory using a 7T1R cell with initialization and pulse overwrite
#176Non-volatile latch using magneto-electric and ferro-electric tunnel junctions