199599 ⎘
Digital stores characterised by arrangements of cells having volatile and non-volatile storage properties for back-up when the power is down in which the volatile element is a SRAM cell and the nonvolatile element is a resistive RAM element, i.e. programmable resistors, e.g. formed of phase change or chalcogenide material
LOGIC DRIVE USING STANDARD COMMODITY PROGRAMMABLE LOGIC IC CHIPS COMPRISING NON-VOLATILE RANDOM ACCESS MEMORY CELLS
#2LOGIC DRIVE USING STANDARD COMMODITY PROGRAMMABLE LOGIC IC CHIPS COMPRISING NON-VOLATILE RANDOM ACCESS MEMORY CELLS
#3Semiconductor Memory Having Both Volatile and Non-Volatile Functionality Comprising Resistive Change Material and Method of Operating
#4LOGIC DRIVE USING STANDARD COMMODITY PROGRAMMABLE LOGIC IC CHIPS COMPRISING NON-VOLATILE RANDOM ACCESS MEMORY CELLS
#5NON-VOLATILE MEMORY BASED COMPUTE-IN-MEMORY CELL
#6Semiconductor memory having both volatile and non-volatile functionality comprising resistive change material and method of operating
#7LOGIC DRIVE USING STANDARD COMMODITY PROGRAMMABLE LOGIC IC CHIPS COMPRISING NON-VOLATILE RANDOM ACCESS MEMORY CELLS
#8Non-volatile memory based compute-in-memory cell
#9Phase-change memory devices, systems, and methods of operating thereof
#10Semiconductor memory having both volatile and non-volatile functionality comprising resistive change material and method of operating
#11Logic drive using standard commodity programmable logic IC chips comprising non-volatile random access memory cells
#12Logic drive using standard commodity programmable logic IC chips comprising non-volatile random access memory cells
#13Method, system and device for integration of volatile and non-volatile memory bitcells
#14Mixed mode memory
#15Semiconductor circuit and semiconductor circuit system to suppress disturbance in the semiconductor circuit
#16Semiconductor circuit and semiconductor circuit system
#17Non-volatile static random access memory with independently accessible non-volatile bit cell and method of operating the same
#18Synapse element increasing a dynamic range of an output while suppressing and/or decreasing power consumption, and a neuromorphic processor including the synapse element
#19Semiconductor memory having both volatile and non-volatile functionality comprising resistive change material and method of operating
#20Multi-partitioning of memories
#21Integrated circuit devices and methods of manufacturing same
#223D cross-bar nonvolatile memory
#23Low power 2D memory transistor for flexible electronics and the fabrication methods thereof
#24SEU stabilized memory cells
#25Dynamic random access memory including threshold switch
#26Memory structure for artificial intelligence (AI) applications
#27Method, system and device for integration of bitcells in a volatile memory array and bitcells in a non-volatile memory array
#28Reconfigurable circuit architecture
#29Logic drive using standard commodity programmable logic IC chips comprising non-volatile random access memory cells
#30Circuit cell for a memory device or logic device
#31Logic drive using standard commodity programmable logic IC chips comprising non-volatile random access memory cells
#32Semiconductor memory having both volatile and non-volatile functionality comprising resistive change material and method of operating
#33Logic drive using standard commodity programmable logic IC chips comprising non-volatile random access memory cells
#34Nonvolatile digital computing with ferroelectric FET
#35Phase change memory in a dual inline memory module
#36Apparatuses and/or methods for operating a memory cell as an anti-fuse
#37Integrated circuit devices
#38Static random access memories with programmable impedance elements and methods and devices including the same
#39Semiconductor circuit and semiconductor circuit system
#40Method, system and device for integration of volatile and non-volatile memory bitcells
#41Method, system and device for integration of volatile and non-volatile memory bitcells
#42Method, system and device for integration of bitcells in a volatile memory array and bitcells in a non-volatile memory array
#43Voltage sensing type of matrix multiplication method for neuromorphic computing system
#44Logic drive using standard commodity programmable logic IC chips comprising non-volatile radom access memory cells
#45METHODS AND APPARATUS FOR MEMORY CELLS THAT COMBINE STATIC RAM AND NON VOLATILE MEMORY
#46TWO-LEVEL SYSTEM MAIN MEMORY
#47Logic drive using standard commodity programmable logic IC chips comprising non-volatile random access memory cells
#48Hybrid configuration memory cell
#49VERTICAL RESISTOR BASED SRAM CELLS
#50Apparatus and method for implementing a multi-level memory hierarchy
#51Semiconductor memory having both volatile and non-volatile functionality comprising resistive change material and method of operating
#52Polarization-based configurable logic gate
#53Multi-partitioning of memories
#543D cross-bar nonvolatile memory
#55Devices and systems to reduce the number of memory type range registers (MTRRS) used to map processor-associated memory
#563-D crossbar architecture for fast energy-efficient in-memory computing of graph transitive closure
#57Method, system and device for non-volatile memory device operation
#58Integrated circuits with programmable non-volatile resistive switch elements
#59Nonvolatile SRAM
#60Method and apparatus for configuring write performance for electrically writable memory devices
#61Refresh architecture and algorithm for non-volatile memories
#62Logic devices, digital filters and video codecs including logic devices, and methods of controlling logic devices
#63Nonvolatile digital computing with ferroelectric FET
#64Techniques for controlling recycling of blocks of memory
#65SRAM bitline equalization using phase change material
#66SRAM bitline equalization using phase change material
#67Vacuum blender
#68Node retainer circuit incorporating RRAM
#69Semiconductor memory having both volatile and non-volatile functionality comprising resistive change material and method of operating
#70Method and device to reduce leakage and dynamic energy consumption in high-speed memories
#71Non-volatile SRAM cell using resistive memory elements
#72Integrated circuit devices including separate memory cells on separate regions of individual substrate
#73Electronic circuit board
#743D cross-bar nonvolatile memory
#75CES-based latching circuits
#76Two-level system main memory
#77Apparatuses and/or methods for operating a memory cell as an anti-fuse
#78MEMORY CONTROLLER, AND MEMORY MODULE AND PROCESSOR INCLUDING THE SAME
#79Multi-partitioning of memories
#80Memory circuit capable of implementing calculation operations
#81Non-volatile resistive memory configuration cell for field programmable gate array
#82Memory mapping
#83Apparatus and method for implementing a multi-level memory hierarchy
#84CES-based latching circuits
#85Non-volatile memory device and operating method thereof
#86METHOD AND DEVICE TO DISTRIBUTE CODE AND DATA STORES BETWEEN VOLATILE MEMORY AND NON-VOLATILE MEMORY
#87Non-volatile SRAM memory cell, and non-volatile semiconductor storage device
#88Direct interface between SRAM and non-volatile memory providing space efficiency by matching pitch in both memories
#89Circuit and array circuit for implementing shift operation
#90Phase change memory in a dual inline memory module
#91Non-volatile SRAM with multiple storage states
#92Memory device including resistance random access memory, and storing method that stores data in the resistance random access memory
#93Techniques for controlling recycling of blocks of memory
#94Static random access memory (SRAM) with programmable resistive elements
#95Apparatuses and/or methods for operating a memory cell as an anti-fuse
#96Data Storage Method, Storage Apparatus, and Computing Device
#97Method, system and device for non-volatile memory device operation
#98Data coherency model and protocol at cluster level
#993D MRAM with through silicon vias or through silicon trenches magnetic shielding
#100Transistor using piezoresistor as channel, and electronic circuit
#101Method and circuit for programming non-volatile memory cells of a volatile/non-volatile memory array
#102System for writing data in a memory
#103Semiconductor memory having both volatile and non-volatile functionality comprising resistive change material and method of operating
#104UNIFIED NON-VOLATILE MEMORY AND ELECTRONIC APPARATUS APPLYING THE NON-VOLATILE MEMORY
#105Self-storing and self-restoring non-volatile static random access memory
#106Non-volatile static random access memory
#107Non-volatile memory using bi-directional resistive elements
#108System and method for polling the status of memory devices
#109INDIRECTION DATA STRUCTURES IMPLEMENTED AS RECONFIGURABLE HARDWARE
#110Memory device with combined non-volatile memory (NVM) and volatile memory
#111Techniques for controlling recycling of blocks of memory
#112Memory cell with retention using resistive memory
#113Node retainer circuit incorporating RRAM
#114ELECTRONIC DEVICE
#115Apparatuses and/or methods for operating a memory cell as an anti-fuse
#116Pseudo SRAM using resistive elements for non-volatile storage
#117Providing multiple memory modes for a processor including internal memory
#118Configurable volatile memory without a dedicated power source for detecting a data save trigger condition
#119Method and apparatus for configuring write performance for electrically writable memory devices
#120Key-value data storage device with hybrid architecture
#121Multi-partitioning of memories
#122Memory cell with non-volatile data storage
#123State-retaining logic cell
#124Non-volatile memory cell
#125Two-level system main memory
#126Non-volatile memory interface
#127Implementing enhanced performance with read before write to phase change memory to avoid write cancellations
#128Data holding circuit including latch circuit and storing circuit having MTJ elements and data recovery method
#129Method for programming a bipolar resistive switching memory device
#130Information processing apparatus, information processing method, and storage medium
#131Multi-context configuration memory
#132Non-volatile SRAM with multiple storage states
#133Storage device, memory cell, and data writing method
#134Variable read delay system
#135Non-volatile memory using bi-directional resistive elements
#136Refresh architecture and algorithm for non-volatile memories
#137SEMICONDUCTOR MEMORY DEVICE
#138Method of dynamically selecting memory cell capacity
#139Electronic device including a semiconductor memory unit that includes cell mats of a plurality of planes vertically stacked
#140Method, apparatus and device for data processing for determining a predetermined state of a memory
#141Method and device for processing an erase counter
#142Semiconductor memory having both volatile and non-volatile functionality comprising resistive change material and method of operating
#143RUNTIME PERSISTENCE
#144SOLID STATE DRIVE WITH RAID FUNCTIONS
#145Thyristor memory cell integrated circuit
#146Memory system for mirroring data
#147Memory system for mirroring data
#148Refresh of data stored in a cross-point non-volatile memory
#149Semiconductor device having a write prohibited region
#150BIMODAL FUNCTIONALITY BETWEEN COHERENT LINK AND MEMORY EXPANSION
#151Memory storage circuit and method of driving memory storage circuit
#152Hardware assisted meta data lookup
#153Data encoding for non-volatile memory
#154Data encoding for non-volatile memory
#155Two-level system main memory
#156Method and apparatus for configuring write performance for electrically writable memory devices
#157Memory circuit, method of driving the same, nonvolatile storage device using the same, and liquid crystal display device
#158Systems and methods for internal initialization of a nonvolatile memory
#159Memory architecture for storing data in a plurality of memory chips
#160Non-volatile memory interface
#161System and method for intelligently flushing data from a processor into a memory subsystem
#162Method and device to reduce leakage and dynamic energy consumption in high-speed memories
#163Non-volatile memory using bi-directional resistive elements
#164Memory cell with volatile and non-volatile storage
#165Resistive random access memory (ReRAM) and conductive bridging random access memory (CBRAM) cross coupled fuse and read method and system
#166System and method for polling the status of memory devices
#167Multi-partitioning of memories
#168Resistance-based random access memory
#169Logic devices, digital filters and video codecs including logic devices, and methods of controlling logic devices
#170Apparatus and method for implementing a multi-level memory hierarchy
#171Phase change memory in a dual inline memory module
#172Storing data in a non-volatile latch
#173Apparatuses and/or methods for operating a memory cell as an anti-fuse
#174Nonvolatile latch circuit
#175Memory device and driving method thereof
#176Non-volatile memory structure and method for fabricating the same
#177Semiconductor memory device
#178Semiconductor memory device
#179Non-volatile random access memory coupled to a first, second and third voltage and operation method thereof
#180Semiconductor memory having both volatile and non-volatile functionality comprising resistive change material and method of operating
#181Semiconductor device
#182Method and apparatus for providing complimentary state retention
#183Multi-partitioning of memories
#184Refresh architecture and algorithm for non-volatile memories
#185Techniques for increasing a lifetime of blocks of memory
#186Two-level system main memory
#187Memory instruction including parameter to affect operating condition of memory
#188Apparatus, system, and method for an interface between a memory controller and a non-volatile memory controller using a command protocol
#189Techniques for increasing a lifetime of blocks of memory
#190Latching circuit
#191Non-volatile static ram cell circuit and timing method
#192Non-volatile static random access memory and operation method thereof
#193Storage devices having a security function and methods of securing data stored in the storage device
#194Semiconductor integrated circuit
#195Amorphous semiconductor threshold switch volatile memory cell
#196Non-volatile logic circuits, integrated circuits including the non-volatile logic circuits, and methods of operating the integrated circuits
#197Nonvolatile logic circuit, integrated circuit including the nonvolatile logic circuit, and method of operating the integrated circuit
#198Non-volatile SRAM cell that incorporates phase-change memory into a CMOS process
#199Phase change memory in a dual inline memory module
#200SEMICONDUCTOR MEMORY DEVICE PROVIDED WITH RESISTANCE CHANGE ELEMENT
#201Non-volatile memory circuit including voltage divider with phase change memory devices
#202Non-volatile single-event upset tolerant latch circuit
#203System, method, and computer program product for increasing a lifetime of a plurality of blocks of memory
#204Semiconductor integrated circuit device
#205Non-volatile memory and the fabrication method
#206Phase change memory latch
#207SEU hardened latches and memory cells using programmable resistance devices
#208Compact static memory cell with non-volatile storage capability
#209Nonvolatile memory cell
#210Nonvolatile memory cell, storage device and nonvolatile logic circuit
#211BISTABLE MULTIVIBRATOR WITH NON-VOLATILE STATE STORAGE
#212Multi-context memory cell
#213Static random access memory cell using chalcogenide
#214Non-volatile memory cell for storage of a data item in an integrated circuit
#215Content addressable memory cell
#216Phase change resistor cell and nonvolatile memory device using the same
#217Non-volatile memory and the fabrication method
#218Physically unclonable function (PUF) memory employing static random access memory (SRAM) bit cells with added passive resistance to enhance transistor imbalance for improved PUF output reproducibility
#219Methods of operating integrated circuit devices having volatile and nonvolatile memory portions
#220Static random access memory device and forming method thereof
#221Methods of making memory devices with programmable impedance elements and vertically formed access devices
#222Non-volatile static random access memory using a 7T1R cell with initialization and pulse overwrite
#223Memory controller with resistive random access memory (ReRAM)