199625 ⎘
Erasable programmable read-only memories electrically programmable; Auxiliary circuits, e.g. for writing into memory; Programming or data input circuits Programming all cells in an array, sector or block to the same state prior to flash erasing
SEMICONDUCTOR MEMORY DEVICE
#2MEMORY CONTROLLER, MEMORY DEVICE AND STORAGE DEVICE
#3PROGRAM OPERATIONS IN MEMORY DEVICES
#4MEMORY DEVICE INCLUDING DUMMY MEMORY BLOCK
#5MEMORY SYSTEM
#6FIVE LEVEL CELL PROGRAM ALGORITHM WITH APPENDED BIT LEVEL ERASE FOR ADDITIONAL THRESHOLD VOLTAGE BUDGET
#7NON-VOLATILE MEMORY WITH CONCURRENT PROGRAMMING
#8NONVOLATILE MEMORY DEVICES AND METHODS OF CONTROLLING ERASE OPERATIONS OF NONVOLATILE MEMORY DEVICES
#9Verifying Or Reading A Cell In An Analog Neural Memory In A Deep Learning Artificial Neural Network
#10PROGRAMMING ERASE STATE AS LAST PROGRAM STATE DURING A PROGRAMMING CYCLE OF A NON-VOLATILE MEMORY STRUCTURE
#11MEMORY SYSTEM
#12METHOD AND NON-TRANSITORY COMPUTER-READABLE STORAGE MEDIUM AND APPARATUS FOR EXECUTING HOST COMMANDS
#13Non-volatile memory with concurrent sub-block programming
#14Memory system
#15NAND FLASH MEMORY DEVICE CAPABLE OF SELECTIVELY ERASING ONE FLASH MEMORY CELL AND OPERATION METHOD THEREOF
#16Semiconductor device performing block program and operating method thereof
#17MEMORY CONTROLLER, MEMORY DEVICE AND STORAGE DEVICE
#18Determining threshold values for voltage distribution metrics
#19Memory device capable of reducing program disturbance and erasing method thereof
#20Fast interval read setup for 3D memory
#21Memory system
#22Memory system and method of operating the same
#23Power state aware scan frequency
#24Initiating media management operation using voltage distribution metrics in memory system
#25Voltage offset bin selection by die group for memory devices
#26Fast interval read setup for 3D NAND flash
#27Block family combination and voltage bin selection
#28Memories for calibrating sensing of memory cell data states
#29Memory controller, memory device and storage device
#30Voltage offset bin selection by die group for memory devices
#31Block family combination and voltage bin selection
#32Method of improving read current stability in analog non-volatile memory by program adjustment for memory cells exhibiting random telegraph noise
#33Semiconductor device and reading method thereof
#34Apparatus for memory cell programming
#35Modifying memory bank operating parameters
#36Programming techniques including an all string verify mode for single-level cells of a memory device
#37Memory system and operating method thereof
#38High-voltage shifter with reduced transistor degradation
#39Memory system and method of operating the same
#40Memory system
#41Memory device capable of reducing program disturbance and erasing method thereof
#42Memory device capable of reducing program disturbance and erasing method thereof
#43Verifying or reading a cell in an analog neural memory in a deep learning artificial neural network
#44Method of concurrent multi-state programming of non-volatile memory with bit line voltage step up
#45Apparatus for calibrating sensing of memory cell data states
#46Semiconductor memory device with erase control
#47Semiconductor memory device
#48Controller and method of operating the same
#49Apparatus and methods for calibrating sensing of memory cell data states
#50Pre-charge voltage for inhibiting unselected NAND memory cell programming
#51Semiconductor memory device
#52Modifying memory bank operating parameters
#53High-voltage shifter with reduced transistor degradation
#54Consolidation of copy-back and write in PRAM blocks
#55Read data sorting method and storage device for sequentially transmitting read data of continuous logic block addresses to host
#56Pre-charge voltage for inhibiting unselected NAND memory cell programming
#57Semiconductor memory device having a channel structure vertically passing through a plurality of memory layers and having memory cell blocks and dummy memory cell blocks
#58Semiconductor storage device
#59Method for operating low-current EEPROM array
#60Memory system for increasing a read reclaim count
#61Memory system
#62BIAS SCHEME FOR WORD PROGRAMMING IN NON-VOLATILE MEMORY AND INHIBIT DISTURB REDUCTION
#63Controller and method of operating the same
#64Neuromorphic memories with split gate flash multi-level cell and method of making the same
#65Method and apparatus for programming analog neural memory in a deep learning artificial neural network
#66Three dimensional semiconductor memory devices
#67Memory system and operating method thereof
#68Fast detection of defective memory block to prevent neighbor plane disturb
#69Semiconductor storage device
#70Memory system for adjusting read reclaim counts and method for operating the same
#71Bias scheme for word programming in non-volatile memory and inhibit disturb reduction
#72Memory system
#73Characterizing and operating a non-volatile memory device
#74Semiconductor memory device for performing erase operation and operating method thereof
#75Semiconductor memory device having a channel structure vertically passing through a plurality of memory layers and having memory cell blocks and dummy memory cell blocks
#76Method, system and device for memory device operation
#77Multi-block non-volatile memories with single unified interface
#78Three dimensional semiconductor memory devices
#79Semiconductor memory device
#80Memory device and information processing system
#81Memory device, memory system, method of operating memory device, and method of operating memory system
#82Memory system and method for operating the same for increasing a read reclaim count value
#83Control circuit, semiconductor storage device, and method of controlling semiconductor storage device
#84Nonvolatile memory device, storage device including nonvolatile memory device and reading method of nonvolatile memory device
#85Semiconductor device, pre-write program, and restoration program
#86Management of data storage in memory cells using a non-integer number of bits per cell
#87Memory system
#88Memory device, memory system, method of operating memory device, and method of operating memory system
#89Nonvolatile memory system and sequential reading and programming methods thereof
#90Multi-state programming for non-volatile memory
#91Rewritable multibit non-volatile memory with soft decode optimization
#92Partial page memory operations
#93EVENT TRIGGERED ERASURE FOR DATA SECURITY
#94SEMICONDUCTOR MEMORY SYSTEM AND METHOD OF OPERATING THE SAME
#95Nonvolatile memory erasure method and device
#96Compaction process for a data storage device
#97Programming interruption management
#98Semiconductor device
#99Nonvolatile memory device and operating method thereof
#100METHOD FOR IMPLEMENTING "INSTANT BOOT" IN A CUSTOMIZABLE SOC
#101Flash memory device
#102Solid-state memory device with plurality of memory cards
#103MEMORY CONTROLLER, MEMORY SYSTEM, AND RELATED METHOD OF OPERATION
#104Method of dynamically selecting memory cell capacity
#105Stacked die flash memory device with serial peripheral interface
#106Method, apparatus and device for data processing for determining a predetermined state of a memory
#107Method and device for processing an erase counter
#108Non-volatile memory devices, memory systems, and methods of operating the same
#109Partial page programming of nonvolatile memory device
#110Erase method for flash
#111Methods for balancing write operations of SLC blocks in different memory areas and apparatus implementing the same
#112Memory control apparatus, memory control method, and storage medium
#113Program VT spread folding for NAND flash memory programming
#114METHOD AND SYSTEM FOR PROGRAMMING A MULTI-BIT PER CELL NON-VOLATILE MEMORY
#115Memory device with defined programming transaction time
#116Mapping between program states and data patterns
#117String dependent parameter setup
#118Semiconductor memory device and erasing method thereof
#119Semiconductor device, method for operating the same, and semiconductor system including the same
#120Semiconductor device and method for operating the same
#121Semiconductor memory device, memory system including the same and operating method thereof
#122Regrouping and skipping cycles in non-volatile memory
#123SYSTEM AND METHOD OF STORING DATA IN A DATA STORAGE DEVICE
#124Program-disturb management for phase change memory
#125Pseudo block operation mode in 3D NAND
#126Semiconductor memory device and method of operating the same
#127Multi-bit memory device and on-chip buffered program method thereof
#128Patching of programmable memory
#129NAND Interface Capacity Extender Device For Extending Solid State Drives Capacity, Performance, And Reliability
#130Techniques for identifying read/write access collisions for a storage medium
#131Pseudo block operation mode in 3D NAND
#1323D Non-Volatile Memory With Control Gate Length Based On Memory Hole Diameter
#133Program and read operations for 3D non-volatile memory based on memory hole diameter
#134Nonvolatile memory and related reprogramming method
#135Recovery of interfacial defects in memory cells
#136Select transistor tuning
#137Memory system and programming method thereof
#138User selectable balance between density and reliability
#139Select transistor tuning
#140Semiconductor memory device
#141Flash EEPROM system with simultaneous multiple data sector programming and storage of physical block characteristics in other designated blocks
#142Refresh algorithm for memories
#143Partial page memory operations
#144Apparatuses and methods including memory array and data line architecture
#145Semiconductor memory device and method of operating the same
#146Split block semiconductor memory device
#147Nonvolatile memory device, programming method thereof and memory system including the same
#148Program-disturb management for phase change memory
#149Error protection for memory devices
#150Nonvolatile memory device and memory management method thereof
#151Semiconductor memory device
#152Apparatuses and methods including memory array and data line architecture
#153User selectable balance between density and reliability
#154Flash EEPROM system with simultaneous multiple data sector programming and storage of physical block characteristics in other designated blocks
#155Memory instruction including parameter to affect operating condition of memory
#156Non-volatile memory (NVM) erase operation with brownout recovery technique
#157METHOD OF PROGRAMMING NONVOLATILE MEMORY DEVICE
#158Method of operating non-volatile memory cell
#159Nonvolatile memory device, programming method thereof and memory system including the same
#160Flash memory timing pre-characterization
#161Flash EEprom system with simultaneous multiple data sector programming and storage of physical block characteristics in other designated blocks
#162Refresh algorithm for memories
#163NAND flash memory device having dummy memory cells and methods of operating same
#164Two pass erase for non-volatile storage
#165Method, apparatus, and system for erasing memory
#166Method of operating non-volatile memory cell and memory device utilizing the method
#167Flash EEPROM system with simultaneous multiple data sector programming and storage of physical block characteristics in other designated blocks
#168Flash EEPROM system with simultaneous multiple data sector programming and storage of physical block characteristics in other designated blocks
#169Flash EEPROM system with simultaneous multiple data sector programming and storage of physical block characteristics in other designated blocks
#170Flash EEprom system with simultaneous multiple data sector programming and storage of physical block characteristics in other designated blocks
#171Method, apparatus, and system for erasing memory
#172NAND flash memory device having dummy memory cells and methods of operating same
#173Programming of a solid state memory utilizing analog communication of bit patterns
#174Flash EEPROM system with simultaneous multiple data sector programming and storage of physical block characteristics in other designated blocks
#175Non-volatile memory with improved erasing operation
#176Controller for refreshing memories
#177Method of erasing flash memory with pre-programming memory cells only in the presence of a cell leakage
#178Flash EEPROM system with simultaneous multiple data sector programming and storage of physical block characteristics in other designated blocks
#179Erase method for flash memory
#180NAND flash memory device having dummy memory cells and methods of operating same
#181Flash memory device with improved pre-program function and method for controlling pre-program operation therein
#182Nonvolatile semiconductor memory device and a method of erasing data thereof
#183Flash EEPROM system with simultaneous multiple data sector programming and storage of physical block characteristics in other designated blocks
#184Non-volatile memory device and erasing method therefor
#185Preconditioning of defective and redundant columns in a memory device
#186Method of converting contents of flash memory cells in the presence of leakage
#187Faster method of erasing flash memory
#188Controller for refreshing memories
#189Memory device and method using positive gate stress to recover overerased cell
#190Semiconductor device
#191Power state aware scan frequency
#192High-voltage shifter with reduced transistor degradation
#193Modifying memory bank operating parameters
#194Non-volatile memory with backing up of programmed data
#195Data encoding method, memory control circuit unit and memory storage device
#196Memory system having feature boosting and operating method thereof
#197Memory sector retirement in a non-volatile memory
#198Dynamic selection of soft decoding information
#199Characterizing and operating a non-volatile memory device
#200Memory programming method, memory control circuit unit and memory storage apparatus
#201Method for operating low-cost EEPROM array
#202Cross page management to avoid NAND physical page size limitation