199565 ⎘
Digital stores characterised by the use of storage elements not covered by groups , , or using resistive RAM [RRAM] elements; Auxiliary circuits; Writing or programming circuits or methods Write using write potential applied to access device gate
COMPENSATION CURRENT FOR A PCM MEMORY
#2THREE-DIMENSIONAL FERROELECTRIC TUNNEL JUNCTION DEVICE FOR MULTIPLY-ACCUMULATE OPERATIONS
#3CROSSBAR ARRAY WITH REDUCED DISTURBANCE
#4CURRENT AND VOLTAGE LIMIT CIRCUITRY FOR RESISTIVE RANDOM ACCESS MEMORY PROGRAMMING
#52T-1R architecture for resistive ram
#6Crossbar array with reduced disturbance
#7Two-terminal non-volatile memory cell for decoupled read and write operations
#8Resistance change memory cell circuits and methods
#9Current and voltage limit circuitry for resistive random access memory programming
#10STDP with synaptic fatigue for learning of spike-time-coded patterns in the presence of parallel rate-coding
#11Semiconductor device including variable resistance element
#122T-1R architecture for resistive RAM
#13Three-dimensional nonvolatile memory device having resistance change structure and method of operating the same
#14Semiconductor device including variable resistance element
#15Resistance change memory cell circuits and methods
#16Nonvolatile memory cells having an embedded selection element and nonvolatile memory cell arrays including the nonvolatile memory cells
#171T-1R architecture for resistive random access memory
#18Resistance change memory cell circuits and methods
#192T-1R architecture for resistive RAM
#20Circuitry and methods for programming resistive random access memory devices
#21Crossbar array with reduced disturbance
#22Programmable artificial neuron and associated programming method
#23Memory circuit and formation method thereof
#24Memory circuit and formation method thereof
#25Apparatus for low power write and read operations for resistive memory
#261T-1R architecture for resistive random access memory
#27Memory devices and memory operational methods
#28Resistive memory device having reduced chip size and operation method thereof
#29Resistance change memory cell circuits and methods
#30STDP with synaptic fatigue for learning of spike-time-coded patterns in the presence of parallel rate-coding
#31Write set operation for memory device with bit line capacitor drive
#322T-1R architecture for resistive ram
#33Non-volatile storage device and driving method
#34Memory systems and memory writing methods
#35Memory systems and memory programming methods
#36Memory systems and memory programming methods
#37Memory circuit and formation method thereof
#38Circuitry and methods for programming resistive random access memory devices
#39Method, system and device for non-volatile memory device operation
#40Memristive arrays with a waveform generation device
#41Memristive control circuits with current control components
#42Select device for memory cell applications
#43Apparatus for low power write and read operations for resistive memory
#442T-1R architecture for resistive RAM
#45STDP with synaptic fatigue for learning of spike-time-coded patterns in the presence of parallel rate-coding
#46Word line overdrive in memory and method therefor
#47Memory write driver, method and system
#48Resistance variable element methods and apparatuses
#491T-1R architecture for resistive random access memory
#50Resistance change memory cell circuits and methods
#51RRAM cell with PMOS access transistor
#52Select device for memory cell applications
#53Method for rewriting semiconductor storage device and the semiconductor storage device
#54Memory systems and memory programming methods
#55Resistance change memory cell circuits and methods
#56Method, system and device for non-volatile memory device operation
#57Nonvolatile resistance changing semiconductor memory using first and second writing operations
#58Metal line connection for improved RRAM reliability, semiconductor arrangement comprising the same, and manufacture thereof
#591T-1R architecture for resistive random access memory
#602T-1R architecture for resistive RAM
#61Select device for memory cell applications
#62Resistance variable element methods and apparatuses
#63Memory devices and methods of writing memory cells at different moments in time
#64Nonvolatile variable resistance memory circuit which includes magnetic tunnel junction element
#65RRAM and method of read operation for RRAM
#66Device and method for forming resistive random access memory cell
#67Memory systems and memory programming methods
#68Apparatus for low power write and read operations for resistive memory
#69Metal line connection for improved RRAM reliability, semiconductor arrangement comprising the same, and manufacture thereof
#70Memory device
#71Semiconductor storage device
#72Resistive change memory including current limitation circuit
#73Non-volatile memory using bi-directional resistive elements
#74Resistance change memory cell circuits and methods
#75Resistive memory device with ramp-up/ramp-down program/erase pulse
#76Silicon based nanoscale crossbar memory
#77Memory systems and memory programming methods
#78Nonvolatile semiconductor storage device including cell transistor performance measuring cells
#79Memory device, semiconductor unit and method of operating the same, and electronic apparatus
#80Memory devices and methods of operating the same
#81Nonvolatile semiconductor storage device having improved reading and writing speed characteristics
#82Programmable logic device with resistive change memories
#83Nonvolatile memory device having a gate coupled to resistors
#84Memory array architecture with two-terminal memory cells
#85Series connected resistance change memory device
#86Methods and systems to read a magnetic tunnel junction (MTJ) based memory cell based on a pulsed read current
#87Memory systems and memory programming methods
#88Memory arrays for both good data retention and low power operation
#89Resistive devices and methods of operation thereof
#90Nonvolatile memory device and method for manufacturing same
#91Silicon based nanoscale crossbar memory
#92Apparatus and methods for forming a memory cell using charge monitoring
#93Three-terminal synapse device and method of operating the same
#94Device and method for forming resistive random access memory cell
#95Apparatuses including current compliance circuits and methods
#96Resistance variable element methods and apparatuses
#97Resistance change memory cell circuits and methods
#98Driving method of non-volatile memory element and non-volatile memory device
#99Resistive volatile/non-volatile floating electrode logic/memory cell
#100Carbon nanotube memory cell with enhanced current control
#101Non-volatile memory system with reset control mechanism and method of operation thereof
#102Semiconductor device
#103Ground circuitry for semiconductor memory device
#104Multilevel mixed valence oxide (MVO) memory
#105Resistive devices and methods of operation thereof
#106Phase change memory word line driver
#107Programming of gated phase-change memory cells
#108Apparatuses including current compliance circuits and methods
#109Method of operating a resistive memory device with a ramp-up/ramp-down program/erase pulse
#110Decoding scheme for bipolar-based diode three-dimensional memory requiring bipolar programming
#111Resistance change memory cell circuits and methods
#112Resistive random access memory cell and resistive random access memory module
#113Parallel programming scheme in multi-bit phase change memory
#114Energy-efficient row driver for programming phase change memory
#115PHASE CHANGE MEMORY DEVICE AND DATA STORAGE DEVICE HAVING THE SAME
#116NON-VOLATILE MEMORY ELEMENTS AND MEMORY DEVICES INCLUDING THE SAME
#117Writing Circuit for a Resistive Memory Cell Arrangement and a Memory Cell Arrangement
#118Nonvolatile semiconductor memory device and manufacturing method thereof
#119Method of operating phase-change memory
#120Resistive memory and program verification method thereof
#121Multilevel mixed valence oxide (MVO) memory
#122Memory array architecture with two-terminal memory cells
#123Phase change memory programming method and phase change memory
#124Adaptive wordline programming bias of a phase change memory
#125Semiconductor device
#126Control method for memory cell
#127Balanced method for programming multi-layer cell memories
#128Memory unit and method of operating the same
#129Memory unit and method of operating the same
#130Asymmetric write current compensation using gate overdrive for resistive sense memory cells
#131Method of programming, erasing and repairing a memory device
#132Nonvolatile semiconductor memory device
#133System for handling data in a semiconductor memory apparatus
#134Silicon based nanoscale crossbar memory
#135Semiconductor device
#136Transistor having an adjustable gate resistance and semiconductor device comprising the same
#137Semiconductor memory device and method of driving the same
#138Phase change memory word line driver
#139Write current compensation using word line boosting circuitry
#140Adaptive wordline programming bias of a phase change memory
#141Asymmetric write current compensation using gate overdrive for resistive sense memory cells
#142Semiconductor memory device
#143Nonvolatile memory device
#144SEMICONDUCTOR DEVICE
#145Variable resistance memory device and related method of operation
#146Storage device and information rerecording method
#147Phase-change memory device
#148Control method for memory cell
#149Asymmetric write current compensation using gate overdrive for resistive sense memory cells
#150Writing method for variable resistance nonvolatile memory element, and variable resistance nonvolatile memory device
#151RESISTANCE RANDOM ACCESS MEMORY HAVING COMMON SOURCE LINE
#152Write current compensation using word line boosting circuitry
#153Adaptive wordline programming bias of a phase change memory
#154Write current compensation using word line boosting circuitry
#155Set algorithm for phase change memory cell
#156Multilevel programming of phase change memory
#157Resistive random access memory and the method of operating the same
#158Method of stabilizing data hold operations of a storage device
#159Gate drive voltage boost schemes for memory array
#160Storage device and information rerecording method
#161Storage device and information recording and verification method
#162Integrated circuit with memory cells comprising a programmable resistor and method for addressing memory cells comprising a programmable resistor
#163Rewritable memory device based on segregation/re-absorption
#164Set algorithm for phase change memory cell
#165Memory cell array
#166Memory cell array
#167Memory cell array
#168Resistive random access memory
#169Phase-change memory device
#170Memories with improved write current
#171Phase change memory program method without over-reset
#172Write current compensation using word line boosting circuitry
#173Write method with voltage line tuning
#174Silicon based nanoscale crossbar memory
#175Nonvolatile semiconductor memory device and writing method of the same
#176SEMICONDUCTOR DEVICE
#177Asymmetric write current compensation using gate overdrive for resistive sense memory cells
#178Synchronous page-mode phase-change memory with ECC and RAM cache
#179Semiconductor RAM device with writing voltage higher than withstand voltage of select transistor
#180Current driven memory cells having enhanced current and enhanced current symmetry
#181Semiconductor memory device with stacked memory cell and method of manufacturing the stacked memory cell
#182Memory and method for dissipation caused by current leakage
#183Method and apparatus for an integrated circuit with programmable memory cells, data system
#184Device controlling phase change storage element and method thereof
#185Adaptive wordline programming bias of a phase change memory
#186Semiconductor memory device and method of writing into the same
#187Apparatus and method of nonvolatile memory device having three-level nonvolatile memory cells
#188Switching device, rewritable logic integrated circuit, and memory device
#189Phase change memory device
#190Circuit for programming a memory element
#191Semiconductor memory device and method of operation
#192Apparatus and method of operating an integrated circuit
#193Method of operating phase-change memory
#194Local bank write buffers for accelerating a phase-change memory
#195Current driven memory cells having enhanced current and enhanced current symmetry
#196Resistance random access memory having common source line
#197Method of programming, erasing and repairing a memory device
#198Method of erasing a resistive memory device
#199Nonvolatile memory device and control method thereof
#200Phase change memory erasable and programmable by a row decoder
#201Integrated circuit having a precharging circuit
#202Thin film phase-change memory
#203High-speed controller for phase-change memory peripheral device
#204Adjustable Current Source for an MRAM Circuit
#205Detecting switching of access elements of phase change memory cells
#206STORAGE DEVICES AND SEMICONDUCTOR DEVICES
#207Memory element, memory read-out element and memory cell
#208Semiconductor integrated circuit device
#209Thin film phase-change memory
#210Detecting switching of access elements of phase change memory cells
#211Control of memory devices possessing variable resistance characteristics
#212Memory device
#213Thin film phase-change memory
#214Semiconductor integrated circuit device
#215Nonvolatile semiconductor memory device
#216Method of driving a non-volatile memory