199743 ⎘
Checking stores for correct operation ; Subsequent repair ; Testing stores during standby or offline operation; Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals during or with feedback to manufacture
ON-DIE TESTING FOR A MEMORY DEVICE
#2APPARATUS WITH CIRCUIT-LOCATING MECHANISM
#3FLASH MEMORY AND TESTING METHOD THEREOF
#4DYNAMIC PRIORITIZATION OF SELECTOR VT SCANS
#5Apparatus with circuit-locating mechanism
#6Managing memory leakages of a system for evaluating manufactured items
#7METAL ISOLATION TESTING IN THE CONTEXT OF MEMORY CELLS
#8Dynamic prioritization of selector Vscans
#9Apparatus with circuit-locating mechanism
#10Systems and methods for correcting data errors in memory
#11On-die testing for a memory device
#12Apparatus, system, and method for trimming analog temperature sensors
#13Systems and methods for correcting data errors in memory
#14Field recovery of graphics on-die memory
#15Apparatus with circuit-locating mechanism
#16Metal isolation testing in the context of memory cells
#17Semiconductor device, test method, and system including the same
#18Information processing apparatus capable of detecting alteration in software
#19Layered semiconductor device, and production method therefor
#20Apparatus for memory device testing and field applications
#21Method for fabricating a circular printed memory device with rotational detection
#22Post-packaging environment recovery of graphics on-die memory
#23Non-contact measurement of memory cell threshold voltage
#24Modifying a manufacturing process of integrated circuits based on large scale quality performance prediction and optimization
#25Semiconductor storage device, operating method thereof and analysis system
#26Memory devices
#27Method for measuring proximity effect on high density magnetic tunnel junction devices in a magnetic random access memory device
#28Systems and methods for correcting data errors in memory
#29Non-contact measurement of memory cell threshold voltage
#30Artificial intelligence based monitoring of solid state drives and dual in-line memory modules
#31TEST INTERFACE BOARD AND SYSTEM INCLUDING THE SAME
#32Semiconductor device and system including the same
#33Secure device state apparatus and method and lifecycle management
#34Test circuit block, variable resistance memory device including the same, and method of forming the variable resistance memory device
#35Anti-hacking mechanisms for flash memory device
#36Device for supporting error correction code and test method thereof
#37Methods for reducing chip testing time using trans-threshold correlations
#38Metal isolation testing in the context of memory cells
#39Method for testing MRAM device and test apparatus thereof
#40System and method of inspecting substrate and method of fabricating semiconductor device using the same
#41Apparatus for memory device testing and field applications
#42Integrated circuit device using multiple one-time programmable bits to control access to a resource
#43Semiconductor device, test method, and system including the same
#44SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
#45Non-volatile memory repair circuit
#46Post-packaging environment recovery of graphics on-die memory
#47Methods and apparatus for detecting defects in memory circuitry
#48Screening method for magnetic storage device, screening apparatus for magnetic storage device, and manufacturing method of magnetic storage device
#49Circular printed memory device with rotational detection
#50Semiconductor integrated circuit
#51Method of testing semiconductor device and method of manufacturing a semiconductor device including the testing method
#52Memory device and memory system performing request-based refresh, and operating method of the memory device
#53Secure device state apparatus and method and lifecycle management
#54Semiconductor memory device and operation setting method thereof
#55DRAM adjacent row disturb mitigation
#56Semiconductor device and method of diagnosing semiconductor device
#57Systems and methods for correcting data errors in memory susceptible to data loss when subjected to elevated temperatures
#58Semiconductor device comprising memory cell
#59SOLID STATE DRIVE OPTIMIZED FOR WAFERS
#60Memory device and operating method thereof
#61SRAM-LIKE EBI STRUCTURE DESIGN AND IMPLEMENTATION TO CAPTURE MOSFET SOURCE-DRAIN LEAKAGE EARILER
#62Memory device, memory system and method of verifying repair result of memory device
#63Memory device and memory system performing request-based refresh, and operating method of the memory device
#64Controller for biasing switching element of a page buffer of a non volatile memory
#65Memory device comprising stacked memory cells and electronic device including the same
#66HEALTH DATA ASSOCIATED WITH A RESISTANCE-BASED MEMORY
#67Method and device for evaluating a chip manufacturing process
#68Semiconductor device for testing large number of devices and composing method and test method thereof
#69Semiconductor memory device
#70System and method of UV programming of non-volatile semiconductor memory
#71Low-test memory stack for non-volatile storage
#72Bad memory unit detection in a solid state drive
#73CHIP, OPERATION METHOD, AND MANUFACTURING METHOD OF ELECTRONIC APPARATUS
#74Data processing device and manufacturing method thereof
#75Circuitry including resistive random access memory storage cells and methods for forming same
#76Process corner sensor for bit-cells
#77Nonvolatile semiconductor memory device and method of manufacturing the same
#78Circuitry including resistive random access memory storage cells and methods for forming same
#79System and method of UV programming of non-volatile semiconductor memory
#80Static random access memory test structure
#81Semiconductor memory device capable of realizing a chip with high operation reliability and high yield
#82Structure and method for determining a defect in integrated circuit manufacturing process
#83UNIVERSAL STRUCTURE FOR MEMORY CELL CHARACTERIZATION
#84Method of in-process intralayer yield detection, interlayer shunt detection and correction
#85METHOD FOR MEMORY CELL CHARACTERIZATION USING UNIVERSAL STRUCTURE
#86Defective bit scheme for multi-layer integrated memory device
#87Semiconductor memory device capable of realizing a chip with high operation reliability and high yield
#88Semiconductor memory device capable of realizing a chip with high operation reliability and high yield
#89Method for simulating long-term performance of a non-volatile memory by exposing the non-volatile memory to heavy-ion radiation
#90Method of executing a forming operation to variable resistance element
#91CORRELATION AND OVERLAY OF LARGE DESIGN PHYSICAL PARTITIONS AND EMBEDDED MACROS TO DETECT IN-LINE DEFECTS
#92Structure and method for determining a defect in integrated circuit manufacturing process
#93Integrated circuit, method for acquiring data and measurement system
#94Method to detect poly residues in LOCOS process
#95Determining history state of data in data retaining device based on state of partially depleted silicon-on-insulator
#96Method and apparatus for implementing enhanced SRAM read performance sort ring oscillator (PSRO)
#97Semiconductor memory device
#98System and Method for Early Qualification of Semiconductor Devices
#99SYSTEM AND COMPUTER PROGRAM FOR EFFICIENT CELL FAILURE RATE ESTIMATION IN CELL ARRAYS
#100Defect analysis methods for semiconductor integrated circuit devices and defect analysis systems
#101Semiconductor memory device capable of realizing a chip with high operation reliability and high yield
#102Test cells for semiconductor yield improvement
#103Method for memory cell characterization using universal structure
#104Universal structure for memory cell characterization
#105Method and system for determining a predicted flash endurance Vt of a flash cell after N program/erase cycles
#106Method and system of analyzing failure in semiconductor integrated circuit device
#107Semiconductor device and fabrication method thereof
#108Circuit and method to measure threshold voltage distributions in SRAM devices
#109Exposure system, semiconductor device, and method for fabricating the semiconductor device
#110Systems and methods for reducing testing times on integrated circuit dies
#111Method and computer program for efficient cell failure rate estimation in cell arrays
#112Semiconductor memory device capable of realizing a chip with high operation reliability and high yield
#113Simulating circuit for magnetic tunnel junction device
#114Sample screening method for system soft error rate evaluation
#115System and method for early qualification of semiconductor devices
#116Semiconductor memory device
#117Semiconductor memory
#118Method for analyzing defect of SRAM cell
#119Analytic structure for failure analysis of semiconductor device
#120Semiconductor memory device capable of realizing a chip with high operation reliability and high yield
#121Transfer base substrate and method of semiconductor device
#122Method and apparatus for evaluating semiconductor device
#123Exposure system, semiconductor device, and method for fabricating the semiconductor device
#124Semiconductor integrated circuit and method of testing same
#125Process monitoring by comparing delays proportional to test voltages and reference voltages
#126Methods for erasing bit cells in a high density data storage device
#127Methods for writing and reading highly resolved domains for high density data storage
#128Method for manufacture of semiconductor device
#129Method of stress-testing an isolation gate in a dynamic random access memory
#130Delay detecting apparatus of delay element in semiconductor device and method thereof
#131Method for testing an integrated semiconductor memory, and integrated semiconductor memory
#132Semiconductor memory
#133Information recording medium and method for manufacturing the same
#134Method for analyzing defect of SRAM cell
#135Failure detection system, failure detection method, and computer program product
#136Spare data site allocation
#137Test key for bridge and continuity testing
#138Semiconductor memory device capable of realizing a chip with high operation reliability and high yield
#139Information recording medium and method for manufacturing the same
#140Method of stress-testing an isolation gate in a dynamic random access memory
#141Test structure for a single-sided buried strap DRAM memory cell array
#142Memory error ranking
#143Method for analyzing fail bit maps of wafers
#144Manufacturing process of memory module with direct die-attachment
#145Distributed memory repair network
#146Refresh time detection circuit and semiconductor device including the same
#147Low-test memory stack for non-volatile storage