199846 ⎘
Indexing scheme relating to arrangements for writing information into, or reading information out from, a digital store Register arrays
Memory device
#2Longest element length determination in memory
#3Multi-port register file device and method of operation in normal mode and test mode
#4SELECTING STORAGE UNITS OF A DISPERSED STORAGE NETWORK
#5Buffer controller, memory device, and integrated circuit device
#6Longest element length determination in memory
#7PERFORMANCE RANKING OF READ REQUESTS IN A DISTRIBUTED STORAGE NETWORK
#8Longest element length determination in memory
#9At-speed test of memory arrays using scan
#10Hold time aware register file module and method therefor
#11Register file with read ports clustered by entry
#12Memory device
#13Semiconductor device and control method of the same
#14Low Voltage Register File Cell Structure
#15Multi-port register file with multiplexed data
#16Low-cost design for register file testability
#17Methods and systems to read register files with un-clocked read wordlines and clocked bitlines, and to pre-charge a biteline to a configurable voltage
#18Self-timing for a multi-ported memory system
#19Register file circuits with P-type evaluation
#20Read port circuit for register file
#21Low leakage and leakage tolerant stack free multi-ported register file
#22Register-file bit-read method and apparatus
#23Register cell and method for writing to the register cell
#24Leakage tolerant register file
#25System and method for cryogenic hybrid technology computing and memory