199834 ⎘
Checking stores for correct operation ; Subsequent repair ; Testing stores during standby or offline operation; Masking faults in memories by using spares or by reconfiguring using programmable devices with improved access time or stability by introducing a delay in a signal path
Memory device
#2Address control circuit and semiconductor device including the same
#3Memory repair enablement
#4Address control circuit and semiconductor device including the same
#5Integrated circuit and precharge/active flag generation circuit
#6Memory apparatus
#7Word line block/select circuit with repair address decision unit
#8SEMICONDUCTOR STORAGE DEVICE AND REDUNDANCY METHOD
#9Bitline leakage detection in memories
#10Block decoding circuits of semiconductor memory devices and methods of operating the same
#11Semiconductor device
#12Word line block/select circuit with repair address decision unit
#13Semiconductor memory device
#14Semiconductor memory apparatus
#15Repair circuit of semiconductor memory device
#16Semiconductor memory device
#17Flash memory having spare sector with shortened access time
#18Memory device with common row interface
#19Memory device with improved output operation margin
#20System and method for providing a redundant memory array in a semiconductor memory integrated circuit
#21Write and read common leveling for 4-bit wide DRAMS
#22Write and read common leveling for 4-bit wide drams
#23Write and read common leveling for 4-bit wide DRAMs