199840 ⎘
Checking stores for correct operation ; Subsequent repair ; Testing stores during standby or offline operation; Masking faults in memories by using spares or by reconfiguring with partially good memories using a single defective memory device with reduced capacity, e.g. half capacity
MAINTENANCE-BASED CONDITIONS FOR BLOCK RETIREMENT
#2DETECTION AND RETIREMENT OF DEFECTIVE BLOCKS
#3SPARING TECHNIQUES IN STACKED MEMORY ARCHITECTURES
#4SPARING TECHNIQUES IN STACKED MEMORY ARCHITECTURES
#5NON-VOLATILE MEMORY MODULE ARCHITECTURE TO SUPPORT MEMORY ERROR CORRECTION
#6OPERATION METHOD OF MEMORY, MEMORY AND MEMORY SYSTEM
#7Non-volatile memory module architecture to support memory error correction
#8SRAM repair system and method
#9DATA LINE (DQ) SPARING WITH ADAPTIVE ERROR CORRECTION CODING (ECC) MODE SWITCHING
#10Non-volatile memory module architecture to support memory error correction
#11Solid state storage device with variable logical capacity based on memory lifecycle
#12ADDRESS GENERATION FOR ADAPTIVE DOUBLE DEVICE DATA CORRECTION SPARING
#13Selective sampling of a data unit based on program/erase execution time
#14Technique to proactively identify potential uncorrectable error correction memory cells and countermeasure in field
#15Non-volatile memory module architecture to support memory error correction
#16Managing data disturbance in a memory with asymmetric disturbance effects
#17Mitigation of solid state memory read failures with a testing procedure
#18Apparatus and techniques for programming anti-fuses to repair a memory device
#19Flash memory block retirement policy
#20Memory controller and operating method for performing garbage collection operation in memory devices
#21Memory and operation method thereof including accessing redundancy world lines by memory controller
#22Electronic device for changing short-type defective memory cell to open-type defective memory cell by applying stress pulse
#23Detection and error-handling of high error rate blocks during copyback
#24RECONSTRUCT DRIVE FOR DYNAMIC RESIZING
#25Memory system and operation method thereof
#26Non-volatile memory module architecture to support memory error correction
#27Method for performing page availability management of memory device, associated memory device and electronic device, and page availability management system
#28Flash memory block retirement policy
#29Error recovery in volatile memory regions
#30Memory module
#31Multi-level memory repurposing technology to process a request to modify a configuration of a persistent storage media
#32Reconstruct drive for dynamic resizing
#33Nonvolatile memory device and memory system including the same
#34System and method for implementing super word line zones in a memory device
#35Memory system and operation method thereof
#36Electronic device for changing short-type defective memory cell to open-type defective memory cell by applying stress pulse
#37Data storage apparatus and operating method thereof
#38Reconstruct drive for dynamic resizing
#39Providing efficient handling of memory array failures in processor-based systems
#40Mapping around defective flash memory of a storage array
#41RECONSTRUCT DRIVE FOR DYNAMIC RESIZING
#42Storage device having various recovery methods and recovery modes
#43Solid state storage device with variable logical capacity based on memory lifecycle
#44Selective online burn-in with adaptive and delayed verification methods for memory
#45Reconstruct drive for dynamic resizing
#46Method and apparatus for reverse memory sparing
#47Masking defective bits in a storage array
#48Electronic device and data-management method thereof
#49Memory devices, testing systems and methods
#50Memory module errors
#51Variable resistance nonvolatile memory device and driving method of variable resistance nonvolatile memory device
#52BURNING SYSTEM AND METHOD
#53Memory devices, testing systems and methods
#54Methods and systems for logic device defect tolerant redundancy
#55Controller and method for virtual LUN assignment for improved memory bank mapping
#56Semiconductor apparatus and chip selecting method thereof
#57METHOD OF RESTORING RECONSTRUCTED MEMORY SPACES
#58INFORMATION STORAGE DEVICE AND INFORMATION STORAGE METHOD
#59EDRAM macro disablement in cache memory
#60Stacked device remapping and repair
#61Logical unit address assignment
#62Multi chip package, manufacturing method thereof, and memory system having the multi chip package
#63Nonvolatile memory device and bad area managing method thereof
#64Semiconductor memory apparatus
#65Semiconductor integrated circuit and control method thereof
#66Semiconductor apparatus, method for assigning chip IDs therein, and method for setting chip IDs thereof
#67Method for performing block management, and associated memory device and controller thereof
#68Memory management apparatus and memory management method
#69Systems and methods for generating dynamic super blocks
#70Nonvolatile semiconductor memory device and method of reusing same
#71EDRAM macro disablement in cache memory
#72Semiconductor memory device incorporating an interface chip for selectively refreshing memory cells in core chips
#73Selective retirement of blocks
#74SEMICONDUCTOR APPARATUS AND CHIP SELECTING METHOD THEREOF
#75Method and system to isolate memory modules in a solid state drive
#76Memory devices, testing systems and methods
#77Semiconductor device and test method thereof
#78Data storage device, controller, and data access method for a downgrade memory
#79Stacked device remapping and repair
#80MEMORY DEVICE AND WEAR LEVELING METHOD THEREOF
#81Stacked device remapping and repair
#82Three dimensionally stacked memory and the isolation of memory cell layer
#83DISABLING PORTIONS OF MEMORY WITH DEFECTS
#84Disabling faulty flash memory dies
#85Disabling portions of memory with defects
#86Recycling faulty multi-die packages
#87Method of manufacturing flash memory device
#88System and method for initiating a bad block disable process in a non-volatile memory
#89Memory apparatus which provides notification of memory capacity
#90Method for Hiding Defective Memory Cells and Semiconductor Memories
#91Method and system for managing memory transactions for memory repair
#92Semiconductor memory device and operating method thereof
#93Semiconductor memory device and manufacturing method thereof
#94System and method for initiating a bad block disable process in a non-volatile memory
#95Disabling portions of memory with non-deterministic errors
#96Disabling faulty flash memory dies
#97Flash memory and method for utilizing the same
#98Recyclying faulty multi-die packages
#99Memory and method for improving the reliability of a memory having a used memory region and an unused memory region
#100Semiconductor memory component and method for testing semiconductor memory components having a restricted memory area (partial good memories)
#101Non-volatile memory card apparatus and method for updating memory capacity information
#102Device and method for configuring a cache tag in accordance with burst length
#103Portable data storage device and method of dynamic memory management therefor
#104Semiconductor memory device and semiconductor memory device test method
#105Controller apparatus for utilizing downgrade memory and method for operating the same
#106Device and method for compensating defect in semiconductor memory
#107Method and apparatus utilizing defect memories
#108Apparatus and method for selectively configuring a memory device using a bi-stable relay
#109Method and apparatus for circuit completion through the use of ball bonds or other connections during the formation of a semiconductor device
#110Method for applying downgraded DRAM to an electronic device and the electronic device thereof
#111Method and apparatus for reconfigurable memory
#112System and method of improving memory yield in frame buffer memory using failing memory location
#113Memory card apparatus configured to provide notification of memory capacity
#114Device and method for configuring a cache tag in accordance with burst length
#115Device and method for compensating defect in semiconductor memory
#116Method and apparatus for reconfigurable memory
#117Random access memory with optional inaccessible memory cells
#118Memory device with a flexible reduced density option
#119Apparatus and method for selectively configuring a memory device using a bi-stable relay
#120Selective sampling of a data unit based on program/erase execution time