199373 ⎘
Arrangements for writing information into, or reading information out from, a digital store; Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers; Read-write modes for single port memories, i.e. having either a random port or a serial port; Serial bit line access mode, e.g. using bit line address shift registers, bit line address counters, bit line burst counters Page serial bit line access mode, i.e. using an enabled row address stroke pulse with its associated word line address and a sequence of enabled column address stroke pulses each with its associated bit line address
Sub-classes:SEMICONDUCTOR MEMORY SYSTEMS WITH ON-DIE DATA BUFFERING
#2MEMORY DEVICES HAVING SPECIAL MODE ACCESS
#3Non-volatile memory device with concurrent bank operations
#4Computer device, setting method for memory module and mainboard
#5Semiconductor memory systems with on-die data buffering
#6Non-volatile memory device with concurrent bank operations
#7Semiconductor storing apparatus including multiple chips and continous readout method
#8Memory devices having special mode access
#9Page buffer and memory device including the same
#10Semiconductor memory systems with on-die data buffering
#11Page buffer and memory device including the same
#12Non-volatile memory device with concurrent bank operations
#13Semiconductor memory systems with on-die data buffering
#14Memory devices having special mode access
#15Non-volatile memory device
#16Fast programming methods for flash memory devices
#17Memory devices having special mode access using a serial message
#18Memory devices having special mode access
#19Non-volatile memory device
#20Memory with output control
#21Method and system for accessing a flash memory device
#22Variable page size architecture
#23Flash memory device
#24Flexible command addressing for memory
#25Method and system for accessing a flash memory device
#26Semiconductor memory systems with on-die data buffering
#27Flash memory system
#28System for writing data in a memory
#29Flash memory system
#30Method and system for accessing a flash memory device
#31Memory system and method of operating the same
#32Memory devices having special mode access using a serial message
#33Semiconductor memory systems with on-die data buffering
#34Register file with read ports clustered by entry
#35Memory with output control
#36Memory device and memory system including the same
#37Flexible command addressing for memory
#38Method and system for accessing a flash memory device
#39Semiconductor device for generating initialization of information in response to a first clock and outputting the initialization information in response to a second clock
#40System and method for increasing DDR memory bandwidth in DDR SDRAM modules
#41Semiconductor memory apparatus and method for driving the same
#42Memory with output control
#43Method for operating a NAND flash memory device in multiple operational modes
#44Distributed write data drivers for burst access memories
#45Semiconductor memory device and control method of the same
#46Memory with multi-page read
#47SEMICONDUCTOR MEMORY DEVICE AND METHOD OF OPERATING THE SAME
#48Common memory device for variable device width and scalable pre-fetch and page size
#49Method and system for accessing a flash memory device
#50Memory with output control
#51FLASH MEMORY SYSTEM CONTROL SCHEME
#52Nonvolatile ferroelectric memory and control device using the same
#53Method and system for accessing a flash memory device
#54Page mode access for non-volatile memory arrays
#55Distributed write data drivers for burst access memories
#56Common memory device for variable device width and scalable pre-fetch and page size
#57ADJUSTABLE READ LATENCY FOR MEMORY DEVICE IN PAGE-MODE ACCESS
#58DRAM with Page Access
#59System and method for setting access and modification for synchronous serial interface NAND
#60Memory with output control
#61Memory devices with page buffer having dual registers and method of using the same
#62Memory with weighted multi-page read
#63Column path circuit
#64PSRAM and method for operating thereof
#65METHOD AND APPARATUS FOR MODIFYING A BURST LENGTH FOR SEMICONDUCTOR MEMORY
#66Flash memory device with data output control
#67Distributed write data drivers for burst access memories
#68Page mode access for non-volatile memory arrays
#69Pipelined burst memory access
#70Semiconductor storage device having page copying function
#71MEMORY DEVICE WITH MULTIPLE CONFIGURATIONS
#72Page buffer for multi-level NAND electrically-programmable semiconductor memories
#73Semiconductor memory and operating method of same
#74Page mode access for non-volatile memory arrays
#75Flash memory device
#76Flash memory system control scheme
#77Filtering bit position in a memory
#78Memory with weighted multi-page read
#79Mode selection in a flash memory device
#80Memory devices with page buffer having dual registers and method of using the same
#81Page buffer circuit of flash memory device and program operation method thereof
#82Memory with output control
#83Flash memory device with sector access
#84Page access circuit of semiconductor memory device
#85Onboard data storage and method
#86Multiple independent serial link memory
#87Semiconductor storage device having page copying function
#88Page buffer circuit of flash memory device with dual page program function and program operation method thereof
#89Partial page scheme for memory technologies
#90Page access circuit of semiconductor memory device
#91Column path circuit
#92Page buffer circuit of flash memory device with improved read operation function and method of controlling read operation thereof
#93Distributed write data drivers for burst access memories
#94Nonvolatile ferroelectric memory and control device using the same
#95Semiconductor storage device having page copying function
#96NAND flash memory device capable of changing a block size
#97Pipelined burst memory access
#98Memory devices with page buffer having dual registers and method of using the same
#99Memory device with column select being variably delayed
#100Semiconductor storage device having page copying function
#101Semiconductor storage device having page copying function
#102Method of increasing DDR memory bandwidth in DDR SDRAM modules
#103Integrated circuit memory with fast page mode verify
#104Method of controlling page buffer having dual register and circuit thereof
#105Memory device having different burst order addressing for read and write operations
#106Memory devices with page buffer having dual registers and method of using the same
#107Dual bus memory burst architecture
#108Semiconductor device with circuit for detecting abnormal waveform of signal and preventing the signal from being transmitted
#109Conductive memory array having page mode and burst mode read capability
#110FeRAM having wide page buffering function
#111Mode selection in a flash memory device
#112Distributed write data drivers for burst access memories
#1131T1C SRAM
#114Non-destructive mode cache programming in NAND flash memory devices