ClassID:

220963

H03H2017/0247 - CPC Classification

Classification description:

Networks using digital techniques; Frequency selective networks; Computation saving measures; Accelerating measures Parallel structures using a slower clock

Recent Application in this class:
#1
20190080035
2019-03-14

Method for equivalent high sampling rate FIR filtering based on FPGA

#2
20170272035
2017-09-21

Digital frequency converter and method of processing in a digital frequency converter

#3
20160079960
2016-03-17

Fast FIR filtering technique for multirate filters

#4
20130083945
2013-04-04

Efficient digital microphone decimation filter architecture

#5
20130050005
2013-02-28

Read Channel With Oversampled Analog To Digital Conversion And Parallel Data Detectors

#6
20120041995
2012-02-16

Multi-branch rate change filter

#7
20120007668
2012-01-12

Filter circuit, transmission filter circuit, semiconductor integrated circuit, communication apparatus, and timing adjustment method for filter circuit

#8
20100241681
2010-09-23

Filtering method and apparatus of low complexity fir filter, and recording medium thereof

#9
20100174768
2010-07-08

Digital signal processing circuit and method comprising band selection

#10
20080198914
2008-08-21

Architecture for systolic nonlinear filter processors

#11
20080013657
2008-01-17

Circuit and method for suppressing interference components in received signal

#12
20070147559
2007-06-28

Operating frequency reduction for transversal FIR filter

#13
20060195883
2006-08-31

Physical layer repeater with discrete time filter for all-digital detection and delay generation

#14
20060178759
2006-08-10

Signal converter for converting a start signal to an end signal and method for converting a start signal to an end signal

#15
20050210092
2005-09-22

Variable passband autoregressive moving average filter

#16
20050210091
2005-09-22

Up-sampling half-band reconstruction filtering

#17
20050201287
2005-09-15

Multiple-stage filtering device and method