221491 ⎘
Manipulating of pulses not covered by one of the other main groups of this subclass; Delay, i.e. output pulse is delayed after input pulse and pulse length of output pulse is dependent on pulse length of input pulse Layout of the delay element
Sub-classes:CLOCK GENERATOR CIRCUIT, CORRESPONDING DEVICE AND METHOD
#2DYNAMIC TRANSMITTER CALIBRATION
#3QUASI TRUE TIME DELAY
#4DELAY LOCKED LOOP AND SEMICONDUCTOR MEMORY DEVICE
#5Adaptive Clocking Architecture
#6PROCESS VARIATION INDEPENDENT POWER-UP INITIALIZATION CIRCUIT THAT GENERATES POWER-UP INITIALIZATION SIGNAL WITH SELF-SHUT-OFF PULSE AND ASSOCIATED POWER-UP INITIALIZATION METHOD
#7Clock generator circuit, corresponding device and method
#8Burn-in resilient integrated circuit for processors
#9Semiconductor device including clock generation circuit
#10Burn-in resilient integrated circuit for processors
#11Information processing device, semiconductor device, and information processing method
#12Semiconductor device including clock generation circuit
#13Circuit for monitoring transient time in analog and digital systems
#14Switch with phase change material
#15SYSTEMS, APPARATUS, AND METHODS FOR PROVIDING CONTINUOUS-TIME SIGNAL DIFFERENTIATION AND INTEGRATION
#16Test method of delay circuit including delay line
#17SIGNAL PROCESSING CIRCUIT
#18Delay circuits and related systems and methods
#19Programmable delay circuit
#20Clock monitoring circuit
#21Glitch-free PLL Multiplexer
#22Ring oscillator-based programmable delay line
#23Repetitive noise cancelation