222238 ⎘
Indexing scheme relating to automatic control of frequency or phase and to synchronisation Modifications for maintaining constant the phase-locked loop damping factor when other loop parameters change
Calibration and/or adjusting gain associated with voltage-controlled oscillator
#2Autoconfigurable Phase-Locked Loop Which Automatically Maintains a Constant Damping Factor and Adjusts the Loop Bandwidth to a Constant Ratio of the Reference Frequency
#3Latency control circuit and semiconductor apparatus using the same
#4Adjusting voltage controlled oscillator gain
#5Apparatuses and methods for compensating for power supply sensitivities of a circuit in a clock path
#6Self-biased delay locked loop with delay linearization
#7Apparatuses and methods for compensating for power supply sensitivities of a circuit in a clock path
#8Apparatuses and methods for compensating for power supply sensitivities of a circuit in a clock path
#9Synchronous network
#10Autoconfigurable phase-locked loop which automatically maintains a constant damping factor and adjusts the loop bandwidth to a constant ratio of the reference frequency
#11Apparatus and methods for adjusting voltage controlled oscillator gain
#12Frequency synthesis system with self-calibrated loop stability and bandwidth
#13Phase lock loop and control method thereof
#14Phase lock loop circuit
#15Frequency synthesis system with self-calibrated loop stability and bandwidth
#16Variance correction method, PLL circuit and semiconductor integrated circuit
#17Variable loop bandwidth phase locked loop
#18ADPLL frequency synthesizer
#19Design structure for a phase locked loop with stabilized dynamic response
#20Apparatus and method for operating a phase-locked loop circuit
#21TEMPERATURE COMPENSATED LOOP FILTER
#22Phase lock loop indicator
#23Variable loop bandwidth phase locked loop
#24Method and apparatus to achieve a process, temperature and divider modulus independent PLL loop bandwidth and damping factor using open-loop calibration techniques
#25Damping coefficient variation mechanism in a phase locked loop
#26System and method for optimizing phase locked loop damping coefficient
#27Phase locked loop damping coefficient correction mechanism
#28High performance analog charge pumped phase locked loop (PLL) architecture with process and temperature compensation in closed loop bandwidth
#29Method of switching PLL characteristics and PLL circuit
#30Variation of effective filter capacitance in phase lock loop circuit loop filters
#31Gain compensated fractional-N phase lock loop system and method
#32System and method for automatic parameter adjustment within a phase locked loop system
#33Systems and methods for automatic bandwidth and damping factor optimization of circuits
#34Techniques for reducing skew between clock signals
#35Clocking scheme for reconfigurable wideband analog-to-digital converter