MODIFIED CONTROL LOOP IN A DIGITAL PHASE-LOCKED LOOP

SYSTEMS AND METHODS FOR PROCESSING VARIABLE CODING AND MODULATION (VCM) BASED COMMUNICATION SIGNALS USING FEEDFORWARD CARRIER AND TIMING RECOVERY

Data recovery using gradients

Modified control loop in a digital phase-locked loop

Systems and methods for processing variable coding and modulation (VCM) based communication signals using feedforward carrier and timing recovery

Clock signal generation circuit

Multiple PLL system with common and difference mode loop filters

Clock synthesis for frequency scaling in programmable logic designs

Touch detection method, touch detection circuit, touch chip and electronic device

Pulse width modulation control circuit and control method of pulse width modulation signal

Synihesizer for radar sensing

Data recovery using subcarriers gradients

Synchronization of an integrated circuit with a sensor

Phased locked loop integrated circuit

Electronic device including plurality of phased locked loop circuits

Delay locked loop to cancel offset and memory device including the same

Phased locked loop integrated circuit

Communication system and transmission device

Phase controller and phase controlling method for antenna array, and communication apparatus using the same

Device and method for supporting clock transfer of multiple clock domains

Synthesizer and phase frequency detector

Calibration of a voltage controlled oscillator to trim the gain thereof, using a phase locked loop and a frequency locked loop

Phase-locked loop output adjustment

Clock synthesis for frequency scaling in programmable logic designs

Apparatus to synchronize clocks of configurable integrated circuit dies through an interconnect bridge

Phase measurement

Synthesizer for radar sensing

Phase-locked-loop architecture

Delay locked loop to cancel offset and memory device including the same

Clock synchronization

Data recovery from sub-carriers

Clock recovery system and method for near field communication with active load modulation

Tracking of signals with at least one subcarrier

Clock and data recovery circuit module and phase lock method

Method and circuit for adjusting the frequency of a clock signal

Phase lock method

Voltage controlled oscillator runaway prevention

Integrated clock generator and method therefor

RF circuit

Transmission apparatus, reception apparatus, and transmission and reception system

Frequency synthesizer circuit

Clock multiplication and distribution

Oscillator circuit and frequency synthesizer

Signal generation circuit and electronic apparatus

Dynamic clock and voltage scaling with low-latency switching

Reception circuit

Double phase-locked loop with frequency stabilization

PHASE LOCKED LOOP AND CONTROL METHOD THEREOF

Direct synchronization of synthesized clock

Circuits for generating sweep frequency signal

Frequency-locked loop circuit and semiconductor integrated circuit

Clock multiplexing for baseband automatic frequency correction

Clock generation circuit

PLL locking control in daisy chained memory system

Semiconductor device generating internal clock signal having higher frequency than that of input clock signal

Oscillation frequency adjusting circuit

Low power, jitter and latency clocking with common reference clock signals for on-package input/output interfaces

Phase-locked loop (PLL) fail-over circuit technique and method to mitigate effects of single-event transients

Method and apparatus for managing arbitrary frequencies

On die low power high accuracy reference clock generation

System and transceiver clocking to minimize required number of reference sources in multi-function cellular applications including GPS

Frequency synthesis and noise reduction

Enhancement of power management using dynamic voltage and frequency scaling and digital phase lock loop high speed bypass mode

PHASE-LOCKED LOOP DEVICE AND CLOCK CALIBRATION METHOD THEREOF

High frequency quadrature PLL circuit and method

Frequency synthesizer

Reference assisted control system and method thereof

Clock device

Signal output device, and output apparatus of signal source of signals and of laser beam pulses

Crystal-less clock generation for radio frequency receivers

Variable capacitance with delay lock loop

Master-slave local oscillator porting between radio integrated circuits

Enhancement of power management using dynamic voltage and frequency scaling and digital phase lock loop high speed bypass mode

Frequency synthesizer and related method for generating wideband signals

High agility frequency synthesizer phase-locked loop

System and transceiver clocking to minimize required number of reference sources in multi-function cellular applications including GPS

Synchronization circuit, synchronization method, and reception system

Three-dimensional chip-stack synchronization

Supply-regulated phase-locked loop (PLL) and method of using

Modular radar system

Synchronization of Low Noise Local Oscillator using Network Connection

Multiple input PLL with hitless switchover between non-integer related input frequencies

Exact frequency translation using dual cascaded sigma-delta modulator controlled phase lock loops

Clock clean-up phase-locked loop (PLL)

Method and apparatus for highly accurate higher frequency signal generation and related level gauge

Methods and systems for delay compensation in global PLL-based timing recovery loops

Method for Detecting Procoagulant Phospholipid

Local signal generation circuit

Frequency synthesis using upconversion PLL processes

Master-slave local oscillator porting between radio integrated circuits

Frequency synthesizer and related method for generating wideband signals

Frequency hold mechanism in a clock and data recovery device

Variable capacitance with delay lock loop

Clock multiplier and clock generator having the same

Novelty LED-projection message balloon

Clock generator, method for generating clock signal and fractional phase lock loop thereof

Timing of ultra wideband pulse generator

Variable-phase ring-oscillator arrays, architectures, and related methods

Switchable phase locked loop and method for the operation of a switchable phase locked loop

Clock generator and clock generating method using delay locked loop

System and method for mitigating phase pulling in a multiple frequency source system

Synchronous follow-up apparatus and synchronous follow-up method

Multiple frequency source system and method of operation

Offset signal phasing for a multiple frequency source system

Switchable PLL circuit

Digital control oscillator

Method for detecting procoagulant phospholipid

Two-system PLL frequency synthesizer

Synthesizer design for network testing device

High agility frequency synthesizer phase-locked loop

Adaptive frequency clock generation system

Method and device for generating a clock signal with predetermined clock signal properties

Clock generation system applicable to PLL

Dual-oscillator signal synthesizer having high frequency offset stage

Master-slave local oscillator porting between radio integrated circuits

Provision of local oscillator signals

Voltage controlled oscillator runaway prevention

Clock generation circuits using jitter attenuation control circuits with dynamic range shifting