222267 ⎘
Analogue/digital conversion; Digital/analogue conversion; Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence by synchronisation
Autonomous Synchronization Architecture for Massively Time-Interleaved Analog to Digital Converters
#2ANALOG-TO-DIGITAL CONVERSION
#3DIGITAL-TO-ANALOG CONVERTER CIRCUITRY
#4Driver Circuit
#5Cross-coupled capacitive elements in highspeed DAC
#6AVS Architecture for SAR ADC
#7TESTING ADCs
#8TIME-INTERLEAVED ADC SKEW CORRECTION
#9Semiconductor integrated circuit, receiver device, and reception method
#10Clock driver for time-interleaved digital-to-analog converter
#11Method for synchronizing analogue-digital or digital-analogue converters, and corresponding system
#12Analog-to-digital converter to identify properties of transmitted signals
#13Signal processing apparatus for use in optical communication
#14Time-interleaved analog-to-digital converter
#15Multi-channel interleaved analog-to-digital converter (ADC) using overlapping multi-phase clocks with SAR-searched input-clock delay adjustments and background offset and gain correction
#16Matrix processor generating SAR-searched input delay adjustments to calibrate timing skews in a multi-channel interleaved analog-to-digital converter (ADC)
#17Timing skew mismatch calibration for time interleaved analog to digital converters
#18Calibration and alignment
#19APPARATUS AND METHOD FOR CONVERSION BETWEEN ANALOG AND DIGITAL DOMAINS WITH A TIME STAMP
#20Sampling synchronization through GPS signals
#21Sampling synchronization through GPS signals
#22Analog to digital converter device and method for calibrating clock skew
#23Trigger to data synchronization of gigahertz digital-to-analog converters
#24Circuit for transferring data from one clock domain to another
#25Analog-to-digital converter for an image sensor
#26Analog-to-digital converter and clock generation circuit thereof
#27State estimation for time synchronization
#28Timing skew mismatch calibration for time interleaved analog to digital converters
#29Error correction method and time-interleaved analog-to-digital converter
#30Circuit for generating multi-phase clock having random disturbance added thereto
#31System and method for background calibration of time interleaved ADC
#32Error compensation correction system and method for analog-to-digital converter with time interleaving structure
#33Track and hold circuits with transformer coupled bootstrap switch
#34Methods, systems and apparatus for hybrid signal processing for pulse amplitude modulation
#35Electronic device forming a digital-to-analog converter and a mixer
#36Sampling clock generating circuit and analog to digital converter
#37Gray code generator
#38Circuit device, physical quantity measurement device, electronic apparatus, and vehicle
#39Phase adjustment for interleaved analog to digital converters
#40Analogue-to-digital converter circuitry employing an alignment signal
#41Dynamic delay adjustment for multi-channel digital-to-analog converter synchronization
#42Clock generator
#43Apparatus and method for conversion between analog and digital domains with a time stamp
#44Digital-to-analog converter (DAC) with partial constant switching
#45Method for synchronizing data converters by means of a signal transmitted from one to the next
#46Digital-to-analog converter (DAC) with partial constant switching
#47Analog digital converter
#48Clocking scheme in nonlinear systems for distortion improvement
#49Laser distance measuring module with ADC error compensation by variation of the sampling instants
#50Method for controlling digital-to-analogue converters and RF transmit circuit arrangement
#51Digital-to-analog converter (DAC) with partial constant switching
#52Sampling clock generating circuit and analog to digital converter
#53Analog-to-digital converters
#54Background calibration of interleave timing errors in time-interleaved analog to digital converters
#55Continuous tracking of mismatch correction in both analog and digital domains in an interleaved ADC
#56Timing recovery for digital receiver with interleaved analog-to-digital converters
#57Cognitive signal converter
#58Digital-to-analog converter (DAC) with partial constant switching
#59Clock generation circuit, successive comparison A/D converter, and integrated circuit device
#60Interconnect structures for minimizing clock and output timing skews in a high speed current steering DAC
#61AD CONVERTER
#62Synchronization for multiple arbitrary waveform generators
#63Multi-channel time-interleaved analog-to-digital converter
#64Solid-state imaging apparatus and imaging device
#65Interleaved A/D converter
#66Apparatus and method for source synchronous testing of signal converters
#67AD converter
#68AD converter and receiving apparatus
#69Digital/analogue conversion
#70Interconnect structures for minimizing clock and output timing skews in a high speed current steering DAC
#71A/D converter, A/D conversion method, solid-state imaging element and camera system
#72Digital to-analog conversion apparatuses and methods
#73Method and circuit for an analog digital capacitance converter
#74Circuitry and methods for use in mixed-signals circuitry
#75Signal-alignment circuitry and methods
#76Class AB signal generation apparatus
#77Image sensor and method of controlling the same
#78Time-to-digital converter and control method
#79Method and apparatus for estimating sampling delay error between first and second analog-to-digital converters of time-interleaved analog-to-digital converter
#80Digital to analog converter comprising mixer
#81DIGITAL/ANALOG CONVERTER CIRCUIT
#82Method and device for use with analog to digital converter
#83AD conversion circuit and solid-state imaging apparatus
#84Preventing interference between microcontroller components
#85POWER SYSTEM DATA ACQUISITION SYSTEMS
#86Power system data acquisition systems
#87Interleaved ADC calibration
#88A/D converter, A/D conversion method, solid-state imaging element and camera system
#89Track-and-hold circuit with low distortion
#90Solid-state image pickup device
#91Synchronous switching in high-speed digital-to-analog converter using quad synchronizing latch
#92CLOCK GENERATOR CIRCUIT FOR SUCCESSIVE APPROXIMATIOM ANALOG TO-DIGITAL CONVERTER
#93Multiplier-free algorithms for sample-time and gain mismatch error estimation in a two-channel time-interleaved analog-to-digital converter
#94A/D conversion device and compensation control method for A/D conversion device
#95Digital-to-analog conversion device
#96Timing skew error correction apparatus and methods
#97System, method, and circuitry for blind timing mismatch estimation of interleaved analog-to-digital converters
#98Digital signal processing based de-serializer
#99Remote session control
#100Microcomputer, semiconductor device, and microcomputer applied equipment
#101Method for detecting and correcting phase shift between I data clock in Q data clock in quadrature modulator or quadrature demodulator
#102Calibration of offset, gain and phase errors in M-channel time-interleaved analog-to-digital converters
#103Track-and-hold circuit with low distortion
#104MULTIPLE SIGNAL SWITCHING CIRCUIT, CURRENT SWITCHING CELL CIRCUIT, LATCH CIRCUIT, CURRENT STEERING TYPE DAC, SEMICONDUCTOR INTEGRATED CIRCUIT, VIDEO DEVICE, AND COMMUNICATION DEVICE
#105Randomization of sample window in calibration of time-interleaved analog to digital converter
#106Meter and freeze of calibration of time-interleaved analog to digital converter
#107A/D conversion apparatus using gray code counter, solid-state image capturing apparatus and electronic information device
#108Methods and systems for DSP-based receivers
#109Correction of sampling mismatch in time-interleaved analog-to-digital converters
#110Calibration of offset, gain and phase errors in M-channel time-interleaved analog-to-digital converters
#111Continuous synchronization for multiple ADCs
#112Error estimation and correction in a two-channel time-interleaved analog-to-digital converter
#113Calibration device and method thereof for pipelined analog-to-digital converter
#114Continuous synchronization for multiple ADCs
#115Minimizing adverse effects of skew between two analog-to-digital converters
#116Remote session control
#117A/D converter
#118Remote media IMS sessions
#119Methods and systems for digitally processing data signals
#120Phase controllable multichannel signal generator having interleaved digital to analog converters
#121Track-and-hold circuit with low distortion
#122Clock generation circuit, analog-digital angle converter using the same, and angle detection apparatus
#123Correcting offset errors associated with a sub-ADC in pipeline analog to digital converters
#124Pipelined analog to digital converter without input sample/hold
#125Track-and-hold circuit with low distortion
#126Sub-harmonic image mitigation in digital-to-analog conversion systems
#127Circuit and method for A/D conversion processing and demodulation device
#128Clock signal generating device and analog-digital conversion device
#129Digital signal processing based de-serializer
#130Arrangement for the synchronous output of analog signals generated in two or more digital-to-analog converters
#131Digital to analog converter with reduced ringing
#132Time-interleaved A/D converter device
#133Circuit and method for improving mismatches between signal converters
#134Methods and systems for DSP-based receivers
#135Digital to analog converter with reduced ringing
#136Interleaved analog to digital converter with compensation for parameter mismatch among individual converters
#137Phase controllable multichannel signal generator
#138Method for adjusting signal generator and signal generator
#139Synchronous analog to digital conversion system and method
#140System and method for improved time-interleaved analog-to-digital converter arrays
#141Circuit arrangement for generating switch-on signals
#142Receiver capable of correcting mismatch of time-interleaved parallel ADC and method thereof
#143Apparatus for channel balancing of multi-channel analog-to-digital converter and method thereof
#144Method and device for estimating time errors in time interleaved A/D converter system
#145Current-steering digital-to-analog converter having a minimum charge injection latch
#146Circuit arrangement for the delay adjustment of analog-to-digital converters operating in a temporally offset manner
#147Plural channel analog-to-digital converter, method and meter employing an input channel with a predetermined direct current bias
#148Apparatus and method for adjusting sampling clock phase in analog-digital converter
#149Superconductor semiconductor integrated circuit
#150Calibration of timing skews in a multi-channel interleaved analog- to-digital converter (ADC) by auto-correlation of muxed-together channels in binary output tree
#151System and method to cancel skew mismatch in ADCs
#152Detecting signal disturbance using asynchronous counter
#153Time error and gain offset estimation in interleaved analog-to-digital converters
#154Image sensor having analog-to-digital converter selectively enabling storage of count value, and analog-to-digital conversion method
#155Apparatus and methods for synchronization of radar chips
#156Time error and gain offset estimation in interleaved analog-to-digital converters
#157Time skew calibration of time-interleaved analog to digital converters
#158Low power synchronization of multiple analog to digital converters
#159Sort-and delay methods for time-to-digital conversion
#160Multiplexer circuit for a digital to analog converter
#161Sort-and delay time-to-digital converter
#162Control device and analog-to-digital conversion controlling method
#163Skew detection and correction in time-interleaved analog-to-digital converters
#164Adaptive correction of interleaving errors in time-interleaved analog-to-digital converters
#165Clocking scheme for reconfigurable wideband analog-to-digital converter