222790 ⎘
Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques Interleaving address generation
Sub-classes:DELAYED SNOOP FOR MULTI-CACHE SYSTEMS
#2MULTICORE SHARED CACHE OPERATION ENGINE
#3BUTTERFLY NETWORK ON LOAD DATA RETURN
#4CREDIT AWARE CENTRAL ARBITRATION FOR MULTI-ENDPOINT, MULTI-CORE SYSTEM
#5VIRTUAL NETWORK PRE-ARBITRATION
#6MULTICORE, MULTIBANK, FULLY CONCURRENT COHERENCE CONTROLLER
#7MULTICORE SHARED CACHE OPERATION ENGINE
#8CONFIGURABLE CACHE FOR COHERENT SYSTEM
#9MULTI-PROCESSOR BRIDGE WITH CACHE ALLOCATE AWARENESS
#10DELAYED SNOOP FOR IMPROVED MULTI-PROCESS FALSE SHARING PARALLEL THREAD PERFORMANCE
#11BUTTERFLY NETWORK ON LOAD DATA RETURN
#12Multicore shared cache operation engine
#13Configurable cache for coherent system
#14Virtual network pre-arbitration for deadlock avoidance and enhanced performance
#15Time interleaver, time deinterleaver, time interleaving method, and time deinterleaving method
#16Decoding method and apparatus, network device, and storage method
#17Time interleaver, time deinterleaver, time interleaving method, and time deinterleaving method
#18Adaptive credit-based replenishment threshold used for transaction arbitration in a system that supports multiple levels of credit expenditure
#19Multicore, multibank, fully concurrent coherence controller
#20CREDIT AWARE CENTRAL ARBITRATION FOR MULTI-ENDPOINT, MULTI-CORE SYSTEM
#21DISTRIBUTED ERROR DETECTION AND CORRECTION WITH HAMMING CODE HANDOFF
#22MULTI-PROCESSOR, MULTI-DOMAIN, MULTI-PROTOCOL, CACHE COHERENT, SPECULATION AWARE SHARED MEMORY AND INTERCONNECT
#23Configurable cache for multi-endpoint heterogeneous coherent system
#24Delayed snoop for improved multi-process false sharing parallel thread performance
#25Multicore shared cache operation engine
#26Tile based interleaving and de-interleaving for digital signal processing
#27Virtual network pre-arbitration for deadlock avoidance and enhanced performance
#28Multi-processor bridge with cache allocate awareness
#29Butterfly network on load data return
#30MULTICORE SHARED CACHE OPERATION ENGINE
#31Deinterleaver
#32Time interleaver, time deinterleaver, time interleaving method, and time deinterleaving method
#33System, method, and apparatus for interleaving data
#34Virtual network pre-arbitration for deadlock avoidance and enhanced performance
#35Tile based interleaving and de-interleaving for digital signal processing
#36Data processing apparatus and method for use in an interleaver suitable for multiple operating modes
#37Tone interleaving methods for multi-bands and wide bandwidth transmissions in WLAN
#38Distributed error detection and correction with hamming code handoff
#39Multi-processor, multi-domain, multi-protocol, cache coherent, speculation aware shared memory and interconnect
#40Adaptive credit-based replenishment threshold used for transaction arbitration in a system that supports multiple levels of credit expenditure
#41Credit aware central arbitration for multi-endpoint, multi-core system
#42Virtual network pre-arbitration for deadlock avoidance and enhanced performance
#43Multi-power-domain bridge with prefetch and write merging
#44Multicore, multibank, fully concurrent coherence controller
#45Delayed snoop for improved multi-process false sharing parallel thread performance
#46Multicore shared cache operation engine
#47Configurable cache for multi-endpoint heterogeneous coherent system
#48Multi-processor bridge with cache allocate awareness
#49Multicore shared cache operation engine
#50Butterfly network on load data return
#51System, method, and apparatus for interleaving data
#52Deinterleaver
#53Time interleaver, time deinterleaver, time interleaving method, and time deinterleaving method
#54Tile based interleaving and de-interleaving for digital signal processing
#55Data processing apparatus and method for use in an interleaver suitable for multiple operating modes
#56Time interleaver, time deinterleaver, time interleaving method, and time deinterleaving method
#57Butterfly network on load data return
#58Time interleaver, time deinterleaver, time interleaving method, and time deinterleaving method
#59Operation methods of terminal and base station in mobile communication networks
#60Data processing apparatus and method for use in an interleaver suitable for multiple operating modes
#61Flexible polynomial-based interleaver
#62Time and cell de-interleaving circuit and method for performing time and cell de-interleaving
#63Time de-interleaving circuit and time de-interleaving method for reducing a number of times of accessing memory
#64Time interleaver, time deinterleaver, time interleaving method, and time deinterleaving method
#65Turbo decoders with stored column indexes for interleaver address generation and out-of-bounds detection and associated methods
#66Method and apparatus for performing interleaving in communication system
#67Data block interleaving and deinterleaving method and apparatus for communication equipments
#68Apparatus and method for generating interleaver index
#69MEMORY ACCESS APPARATUS AND METHOD FOR INTERLEAVING AND DEINTERLEAVING
#70Low power long range transmitter
#71METHODS AND APPARATUS FOR ERROR CODING
#72Tile based interleaving and de-interleaving for digital signal processing
#73Vector-based matching circuit for data streams
#74Method and apparatus for memory access
#75Turbo code interleaver with near optimal performance
#76Area and power efficient architectures of time deinterleaver for receivers
#77Data processing apparatus and method for use in a 0.5K mode interleaver in a digital video broadcasting standard including DVB-Terrestrial2
#78Interleaver with parallel address queue arbitration dependent on which queues are empty
#79Method and apparatus for a parameterized interleaver design process
#80Simplified parallel address-generation for interleaver
#811K mode interleaver in a digital video broadcasting (DVB) standard
#82Interleaver address generation in turbo decoders for wireless communication systems
#83Reconfigurable interleaver having reconfigurable counters
#84Method and apparatus for transmitting and receiving a timing correction message in a wireless communication system
#85Method and apparatus for implementing interleaving and de-interleaving at second time
#86Turbo decoding device and communication device
#87Address generation for contention-free memory mappings of turbo codes with ARP (almost regular permutation) interleaves
#88Data processing apparatus and method for use in a 0.5K mode interleaver in a digital video broadcasting standard including DVB-Terrestrial2
#89ADDRESS GENERATOR OF COMMUNICATION DATA INTERLEAVER AND COMMUNICATION DATA DECODING CIRCUIT
#90Apparatus and method for channel interleaving in communications system
#91Area and power efficient architectures of time deinterleaver for ISDB-T receivers
#92Physical layer processing for a wireless communication system using code division multiple access
#93Parallel pruned bit-reversal interleaver
#94Method and apparatus for generating a permutation for forwarding link hopping in wireless communication system
#95Deinterleaver for a communication device
#96Pruning methods for the generation of S-random interleavers, and interleaver performing the methods
#97Interleaver address generation in turbo decoders for mobile multimedia multicast system communication systems
#98Interleaving with iterative calculation of interleaving addresses
#99Address generation for multiple access of memory
#100Pruned bit-reversal interleaver
#101Pruned bit-reversal interleaver
#102De-Interlever That Simultaneously Generates Multiple Reorder Indices
#103Method and apparatus for bit demultiplexing in a wireless communication systems
#104Area and power efficient architectures of time deinterleaver for ISDB-T receivers
#105Method and apparatus for transmitting and receiving a timing correction message in a wireless communication system
#106Method and apparatus for generating a permutation for reverse link hopping in wireless communication system
#107Physical layer processing for a wireless communication system using code division multiple access
#1081K mode interleaver in a digital video broadcasting (DVB) standard
#109Data processing apparatus and method using a 32K mode interleaver in a digital video broadcasting (DVB) standard including the DVB-Terrestrial2 (DVB-T2) standard
#110APPARATUS AND METHOD FOR BLOCK INTERLEAVING IN MOBILE COMMUNICATION SYSTEM
#111Method and apparatus for bit interleaving and deinterleaving in wireless communication systems
#112Structured de-interleaving scheme for product code decoders
#113Multiple access for parallel turbo decoder
#114Interleaving of information bits
#115Interleaver with linear feedback shift register
#116METHOD AND APPARATUS FOR CONVOLUTIONAL INTERLEAVING/DE-INTERLEAVING TECHNIQUE
#117Address generation for contention-free memory mappings of turbo codes with ARP (almost regular permutation) interleaves
#118Turbo code interleaver with optimal performance
#119Turbo code interleaver with near optimal performance
#120Turbo code interleaver with near optimal performance
#121TIME DE-INTERLEAVER IMPLEMENTATION USING SDRAM IN A TDS-OFDM RECEIVER
#122RECONFIGURABLE CONVOLUTIONAL INTERLEAVER/DEINTERLEAVER USING MINIMUM AMOUNT OF MEMORY AND AN ADDRESS GENERATOR
#123Interleaver and de-interleaver
#124Interleaving apparatus and method in communication system
#125Interleaver for IEEE 802.11n standard
#126Address generator for an interleaver memory and a deinterleaver memory
#127Multi-standard turbo interleaver using tables
#128Intelligent table-driven interleaving
#129Turbo code interleaver for low frame error rate
#130Interleaving method and system
#131Structured interleaving/de-interleaving scheme for product code encoders/decorders
#132Low complexity pseudo-random interleaver
#133Convolutional interleaver/de-interleaver
#134Apparatus and method for channel interleaving in communications system
#135System and method for time diversity
#136Pre-emptive interleaver address generator for turbo decoders
#137Interleaving of information bits
#138Pruned bit-reversal interleaver
#139System and method for modulation diversity
#140Prunable S-random interleavers
#141System and method for frequency diversity
#142Addresses generation for interleavers in turbo encoders and decoders
#143System and method for providing 3-dimensional joint interleaver and circulation transmissions
#144Methods and apparatus for circulation transmissions for OFDM-based MIMO systems
#145Efficient address generation for Forney's modular periodic interleavers
#146De-interleaver, mobile communication terminal, and de-interleaving method
#147Method and apparatus for convolutional interleaving/de-interleaving technique
#148Interleave device, interleaving method, deinterleave device, and deinterleave method
#149Memory control method for time deinterleaving in DMB receiver
#150Turbo decoder and turbo interleaver
#151Turbo code interleaver with near optimal performance
#152Method and device of de-interleaving successive sequences of interleaved data samples
#153Deinterleaving device for digital broadcast receivers having a downsized deinterleaver memory and deinterleaving method thereof
#154Interleaving order generator, interleaver, turbo encoder, and turbo decoder
#155Interleaving circuit for a multiband OFDM transceiver
#156Method to efficiently generate the row and column index for half rate interleaver in GSM
#157Address generator for block interleaving
#158Convolutional interleaver and deinterleaver
#159Device and method for minimizing puncturing-caused output delay
#160Method, apparatus, and system for deinterleaving data