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Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes; Turbo codes and decoding; Particular turbo code structure Turbo-block codes, i.e. turbo codes based on block codes, e.g. turbo decoding of product codes
Method and device for decoding data
#2Method for generating a signal by means of a turbo-encoder, and corresponding device and computer program
#3Decoding method and device for turbo product codes, decoder and computer storage medium
#4Soft decoding of rate-compatible polar codes
#5LPWAN communication protocol design with turbo codes
#6Low-complexity syndrom based decoding apparatus and method thereof
#7Parity bit channel assignment for polar coding
#8Error correction circuit, operating method thereof and data storage device including the same
#9Soft decoding of rate-compatible polar codes
#10Irregular polar code encoding
#11Error correction circuit, operating method thereof and data storage device including the same
#12Decoder controller, error correction circuit, operating method thereof and data storage device including the same
#13ERROR CORRECTION CIRCUIT, OPERATING METHOD THEREOF AND DATA STORAGE DEVICE INCLUDING THE SAME
#14Turbo product polar coding with hard decision cleaning
#15SD decoder for digital communications
#16Hybrid type iterative decoding method and apparatus
#17Method and apparatus for decoding three-dimensional turbo product code based on crossing layers
#18Parity bit channel assignment for polar coding
#19Append only streams for storing data on a solid state device
#20Soft decoding of rate-compatible polar codes
#21Irregular polar code encoding
#22Soft-output decoding of codewords encoded with polar code
#23Memory system and operating method thereof
#24Soft decoder for generalized product codes
#25Hybrid soft decoding algorithm for multiple-dimension TPC codes
#26Techniques for low-latency chase decoding of turbo product codes with soft information
#27Code reconstruction scheme for multiple code rate TPC decoder
#28Optical coherent receiver with forward error correction
#29Techniques for low complexity soft decoder for turbo product codes
#30Techniques for low complexity turbo product code decoding
#31One-shot decoder for two-error-correcting BCH codes
#32Performance optimization in soft decoding for turbo product codes
#33Miscorrection avoidance for turbo product codes
#34Turbo product coded modulation
#35Incremental LLR generation for flash memories
#36Encoder and decoder design for near-balanced codes
#37Scheme to avoid miscorrection for turbo product codes
#38Reliability-assisted bit-flipping decoding algorithm
#39GLDPC soft decoding with hard decision inputs
#40Operating method of flash memory system
#41Staggered parity
#42Turbo product codes for NAND flash
#43Error correction coding with high-degree overlap among component codes
#44Apparatus and method for turbo product codes
#45Method for performing channel interleaving in a multi-antenna wireless communication system, and apparatus for same
#46Method for performing channel interleaving in a multi-antenna wireless communication system, and apparatus for same
#47Turbo encoding on a parallel processor
#48Buffer management in a turbo equalization system
#49Miscorrection detection for error correcting codes using bit reliabilities
#50Syndrome tables for decoding turbo-product codes
#51Impaired carrier coding
#52Turbo-product codes (TPC) with interleaving
#53Method and system for generation of a tie-breaking metric in a low-density parity check data encoding system
#54Method, apparatus and system for handling data faults
#55Error correction encoding method, decoding method and associated devices
#56Forward error correction (FEC) convergence by controlling reliability levels of decoded words in a soft FEC decoder
#57Method of decoding LDPC code for producing several different decoders using parity-check matrix of LDPC code and LDPC code system including the same
#58Method for performing channel interleaving in a multi-antenna wireless communication system, and apparatus for same
#59Disaster-proof data safe for housing functional electronic data processing, storage and communications systems
#60Data block processor in a mobile DTV system with diversity
#61Transmitter, encoding apparatus, receiver, and decoding apparatus
#62Method of producing and decoding error correction code and apparatus therefor
#63Joint carrier phase estimation and forward error correction
#64Reverse concatenated encoding and decoding
#65System and method for multi-dimensional decoding
#66System and method for multi-dimensional decoding
#67Method and device for encoding of error correcting codes, and method and device for decoding of error correcting codes
#68Constant amplitude encoding apparatus and method for code division multiplexing communication system
#69Communication device employing binary product coding with selective additional cyclic redundancy check (CRC) therein
#70CHANNEL ENCODING AND DECODING APPARATUSES AND METHODS
#71METHODS AND DEVICES FOR DECODING AND ENCODING DATA
#72Antenna mapping in a MIMO wireless communication system
#73High rate turbo encoder and decoder for product codes
#74Methods of soft-input soft-output decoding for nonvolatile memory
#75System for Compensating Turbodecoder Phase Shift
#76Method for error detection in a decoded digital signal stream
#77Encoding method, transmitter, network element and communication terminal
#78Methods and apparatus for reducing error floors in message passing decoders
#79System and method for data transmissin and reception
#80Block processing in a block decoding device
#81Iterative detector with ECC in channel domain
#82Enhanced turbo product code decoder system
#83Method for forming rate compatible code using high dimensional product codes
#84Low complexity hybrid ARQ scheme based on rate compatible zigzag codes
#85Combining spectral shaping with turbo coding in a channel coding system
#86Running digital sum coding system
#87Decoder performance for block product codes
#88Expanding architecture for error correction code and method for the same
#89Turbo product code implementation and decoding termination method and apparatus
#90Cyclic redundancy check based message passing in turbo product code decoding
#91Method of forming parity check matrix for parallel concatenated LDPC code
#92Channel encoding/decoding apparatus and method using a parallel concatenated low density parity check code
#93Channel coding/decoding apparatus and method using a parallel concatenated low density parity check code
#94Methods and apparatus for reducing error floors in message passing decoders
#95Encoding and decoding methods and apparatuses for recording system
#96System and method for data transmission and reception
#97Software defined modem
#98Stopping rules for turbo product codes
#99Chase decoding for turbo-product codes (TPC) using error intersections
#100Size limited multi-dimensional decoding
#101Systems and methods for detection and correction of error floor events in iterative systems
#102Buffer management in a turbo equalization system