Noise generation for differential privacy

Method of Viterbi algorithm and receiving device

Convolutional code decoder and convolutional code decoding method

Electronic apparatus for compression and decompression of data and compression method thereof

Signal processing apparatus and signal processing method

Convolutional decoder and method of decoding convolutional codes

Decoding of messages with known or hypothesized difference

Method for controlling decoding process based on path metric value and computing apparatus and mobile device for controlling the same

Convolutional decoder and method of decoding convolutional codes

Trellis segment separation for low-complexity viterbi decoding of high-rate convolutional codes

Multi mode viterbi decoder

Electronic system with Viterbi decoder mechanism and method of operation thereof

Viterbi decoding device and method for decoding a signal produced by a convolutional encoder

Decoding apparatus, decoding method, and decoding program for use in quantum error correction

Add-compare-select instruction

Apparatus and method for decoding maximum a posteriori

Method and apparatus for joint equalization and decoding of multidimensional codes transmitted over multiple symbol durations

Viterbi butterfly operations

Technique for optimization and re-use of hardware in the implementation of instructions used in Viterbi and turbo decoding, using carry save arithmetic

Method and device for implementing Viterbi decoding

Signal processing apparatus, signal processing method, and magnetic disk apparatus

INFORMATION REPRODUCTION APPARATUS AND INFORMATION REPRODUCTION METHOD

Processor for processing digital data with pipelined butterfly operator for the execution of an FFT/IFFT and telecommunication device

ADAPTIVE ETHERNET TRANSCEIVER WITH JOINT DECISION FEEDBACK EQUALIZER AND TRELLIS DECODER

Processor instructions to accelerate Viterbi decoding

Apparatus and method for processing operations in parallel using a single instruction multiple data processor

Processor for processing digital data with butterfly operator for the execution of an FFT/IFFT and telecommunication device

Addition/subtraction hardware operator, processor and telecommunication terminal including an operator of this type

Method and apparatus for joint equalization and decoding of multidimensional codes transmitted over multiple symbol durations

CONVOLUTIONALLY ENCODING AND DECODING MULTIPLE DATA STREAMS

Multi-standard viterbi processor

Viterbi decoder and writing and reading method

Methods to improve ACS performance

Decoding circuit operating in response to decoded result and/or a plurality of viterbi target levels with pattern dependency

Soft output viterbi decoder architecture

Optimized Viterbi decoder and GNSS receiver

Calibration method and circuit for an add-compare-select loop

List Output Viterbi Deconder with Blockwise ACS and Traceback

Enhanced VSB viterbi decoder

Scalable VLIW processor for high-speed viterbi and trellis coded modulation decoding

Differential Locally Updating Viterbi Decoder

MAXIMUM LIKELIHOOD DECODER AND INFORMATION REPRODUCTION APPARATUS

Viterbi detector and information reproducing apparatus

Low-power predecoding based viterbi decoding

Reduced complexity viterbi decoding

DEMODULATION METHOD AND APPARATUS

METHOD AND APPARATUS FOR CODING RELATING TO A FORWARD LOOP

High speed turbo codes decoder for 3G using pipelined SISO Log-MAP decoders architecture

Parallel concatenated code with soft-in soft-out interactive turbo decoder

Iterative decoding for layer coded OFDM communication systems

Meta-Viterbi algorithm for use in communication systems

Methods and apparatus for reduced complexity soft-output viterbi detection

Methods and systems for a-priori decoding based on MAP messages

Trellis-based decoder using states of reduced uncertainty

ACS unit of a Viterbi decoder and method for calculating a bit error rate before a Viterbi decoder

Control channel detection scheme

Reduced complexity Viterbi decoder

Decoder using a memory for storing state metrics implementing a decoder trellis

High speed turbo codes decoder for 3G using pipelined SISO Log-MAP decoders architecture

Programmable compute unit with internal register and bit FIFO for executing Viterbi code

High-speed add-compare-select (ACS) circuit

Method and apparatus for implementing decode operations in a data processor

Soft Bit Viterbi Equalizer Using Partially Collapsed Metrics

Register exchange network for radix-4 SOVA (Soft-Output Viterbi Algorithm)

ACS (add compare select) implementation for radix-4 SOVA (soft-output viterbi algorithm)

E2PR4 viterbi detector and method for adding a branch metric to the path metric of the surviving path after selecting the surviving path

Viterbi decoder and method thereof

Methods, apparatus, and systems for determining 1T state metric differences in an nT implementation of a viterbi decoder

Addressing strategy for Viterbi metric computation

High-speed radix-4 butterfly module and method of performing Viterbi decoding using the same

ACS unit and method thereof

Hardware-Efficient, Low-Latency Architectures for High Throughput Viterbi Decoders

DIGITAL DATA DECODING APPARATUS AND DIGITAL DATA DECODING METHOD

COMMUNICATIONS DIGITAL SIGNAL PROCESSOR AND DIGITAL SIGNAL PROCESSING METHOD

Method and system for improving the performance of a trellis-based decoder

Apparatus and method for soft decision viterbi decoding

Parallel concatenated code with soft-in soft-out interactive turbo decoder

VITERBI DECODING APPARATUS AND TECHNIQUES

Scheduling pipelined state update for high-speed trellis processing

Viterbi pack instruction

MULTI-RATE VITERBI DECODER

ACS circuit

Viterbi decoding circuit and wireless device

Reconfigurable bit-manipulation node

Reconfigurable bit-manipulation node

Acs apparatus and method for viterbi decoder

CASCADED RADIX ARCHITECTURE FOR HIGH-SPEED VITERBI DECODER

Viterbi decoding method and apparatus for high speed data transmissions

ACS circuit and Viterbi decoder with the circuit

Path metric computation unit for use in a data detector

Decoding apparatus, decoding method, program-recording medium, program and recording/reproduction apparatus

Convolutionally encoding and decoding multiple data streams

Viterbi pretraceback for partial cascade processing

Parallel concatenated code with soft-in-soft-out interactive turbo decoder

Method and apparatus for implementing decode operations in a data processor

Decoder for executing a Viterbi algorithm

Viterbi decoder

Viterbi decoder architecture for use in software-defined radio systems

System and method for multi-mode multi-state path metric addressing

Method for equalization of a data signal taking into account a disturbance channel

Adaptive Viterbi decoder for a wireless data network receiver

Meta-Viterbi algorithm for use in communication systems

Soft bit viterbi equalizer using partially collapsed metrics

Track buffer in a parallel decoder

Parallel decoder for ultrawide bandwidth receiver

Scalable traceback technique for channel decoder

Hybrid trace back apparatus and high-speed viterbi decoding system using the same

Enhanced VSB Viterbi decoder

Method of computing path metrics in a high-speed Viterbi detector and related apparatus thereof

Decoding circuit and decoding method for a Viterbi decoder

Decoder using a memory for storing state metrics implementing a decoder trellis

OFDM signal receiver device and OFDM signal receiving method

Method of and apparatus for implementing a reconfigurable trellis-type decoding

Multi-rate viterbi decoder

Method of and apparatus for implementing fast orthogonal transforms of variable size

Data reproducing apparatus avoiding selection of incorrect path

Combined turbo-code/convolutional code decoder, in particular for mobile radio systems

Method and apparatus for precomputation and pipelined selection of intersymbol interference estimates in a reduced-state Viterbi detector

Add-compare-select-offset device and method in a decoder

Parallel decision-feedback decoder and method for joint equalizing and decoding of incoming data stream

Circuit for carrying out the add compare select operation with a functionality going beyond this

Data demodulation apparatus and method

Add-compare-select accelerator using pre-compare-select-add operation

Communications digital signal processor and digital signal processing method

Method for determining signal quality of simultaneously received multiple channels of data

Technique for improving viterbi decoder performance

Unified viterbi/turbo decoder for mobile communication systems

Branch metric computation and add-compare-select operation in viterbi decoders

Semi-fixed circuit

Calculating apparatus and method for use in a maximum likelihood detector and/or decoder

Method of blindly detecting a transport format of an incident convolutional encoded signal, and corresponding convolutional code decoder

Configurable architecture and its implementation of viterbi decorder

Low-latency architectures for high-throughput Viterbi decoders

Apparatus and methods for forward error correction decoding

Maximum likelihood detector and/or decoder

Reconfigurable Viterbi/turbo decoder

Parallel concatenated code with soft-in soft-out interactive turbo decoder

Parallel concatenated code with soft-in soft-out interactive turbo decoder

Parallel concatenated code with soft-in soft-out interactive turbo decoder

Error data generation and application for disk drive applications

Circular pipeline processing system

Method and apparatus for decoding independently encoded signals