222567 ⎘
Conversion of the form of the representation of individual digits
Sub-classes:Power switch and control method thereof
#2Method for compressing and restoring time series data
#3Method and apparatus for compressing data
#4Switch assembly and control method thereof
#5Methods, devices and systems for hybrid data compression and decompression
#6Electronic apparatus for compression and decompression of data and compression method thereof
#7Data bus inversion (DBI) on pulse amplitude modulation (PAM) and reducing coupling and power noise on PAM-4 I/O
#8Compression scheme with control of search agent activity
#9Systems for transmitting a data stream and methods for transmitting a data stream
#10Encoder, encoding method, decoder, decoding method, and codec system
#11Capacitor order determination in an analog-to-digital converter
#12Selection of data compression technique based on input characteristics
#13Rate converter
#14Data transmitter
#15System and a method for a line encoded data stream
#16Memory controller, memory system, and control method
#17Methods, devices and systems for hybrid data compression and decompression
#18Rate convertor
#19Encoder, encoding method, decoder, decoding method, and codec system
#20Capacitor order determination in an analog-to-digital converter
#21Path encoding and decoding
#22Path encoding and decoding
#23Path encoding and decoding
#24Decoding device, information transmission system, and non-transitory computer readable medium
#25Path encoding and decoding
#26Semiconductor device
#27Digital encoding of parallel busses to suppress simultaneous switching output noise
#28Multi-wire symbol transition clocking symbol error correction
#29Error detection constants of symbol transition clocking transcoding
#30Rate convertor
#31Tape header format having efficient and robust codeword interleave designation (CWID) protection
#32Encoding payloads according to data types while maintaining running disparity
#33Maintaining running disparity while utilizing different line-codes
#34Efficient two-stage asynchronous sample-rate converter
#35Data processing apparatus that enables import/export of setting value, control method therefor, and storage medium storing control program therefor
#36Dynamic decoding of communication between card reader and portable device
#37Data bus inversion apparatus, systems, and methods
#38Method and apparatus for flexibly converting and routing data between disparate systems
#39Method and apparatus for parallel data interfacing using combined coding and recording medium therefor
#40Data bus inversion apparatus, systems, and methods
#41Method and apparatus for parallel data interfacing using combined coding and recording medium therefor
#42Data bus inversion apparatus, systems, and methods
#43Data bus inversion apparatus, systems, and methods
#44Method of error correction for a series of marks on an optical disc
#45State modulation method and apparatus for inserting state control codes
#46Symbol frequency leveling in a storage system
#47DC free code design with state dependent mapping
#48Prefix compression for keyed values
#49Command processor with multiple string copy engines for a decompression system
#50Device and method of compressing data using tiered data compression
#51Mechanism for data generation in data processing systems
#52Reducing data transition rates between analog and digital chips