H03M7/3015 - CPC Classification Index

ClassID:

222611 ⎘

H03M7/3015 - CPC Classification

Classification description:

Conversion of a code where information is represented by a given sequence or number of digits to a code where the same, similar or subset of information is represented by a different sequence or number of digits; Compression ; Expansion; Suppression of unnecessary data, e.g. redundancy reduction; Conversion to or from differential modulation; Digital delta-sigma modulation Structural details of digital delta-sigma modulators

Sub-classes:

H03M7/3017 » {Arrangements specific to bandpass modulators} 15
H03M7/302 » {characterised by the number of quantisers and their type and resolution} 18
H03M7/3031 » {characterised by the order of the loop filter, e.g. having a first order loop filter in the feedforward path} 14

Recent Application in this class:

20260095186

HYBRID FRACTIONAL PHASE-LOCKED LOOP

20230421173

Huffman packing for delta compression

20180205352

Amplifiers with delta-sigma modulators using pulse-density modulations and related processes

20170331491

Delta-sigma modulator and modulation method, transmission device, and transmission method

20170134055

Signal amplification and transmission based on complex delta sigma modulator

20150234960

Automation for configurable mixed-signal systems

20150180503

Configurable mixed-signal systems

20130099955

Signal quantization method and apparatus and sensor based thereon

20080198050

Delta-sigma modulator and DA converter apparatus including delta-sigma modulator changing order of filter

20070241951

Sigma-delta modulator and method for sigma-delta modulation

20070127761

Microphone comprising integral multi-level quantizer and single-bit conversion means

20060133517

Method and apparatus for variable sigma-delta modulation

20050088328

Variable-order delta sigma modulator and DA converter

20050080494

Delta sigma modulator with integral decimation

20050001750

Delta-sigma modulator

14668195

Digital correction of spurious tones caused by a phase detector of a hybrid analog-digital delta-sigma modulator based fractional-N phase locked loop