225710 ⎘
Baseband systems; Details ; arrangements for supplying electrical power along data transmission lines; Arrangements for coupling to transmission lines; Arrangements specific to the receiver end Provision for current-mode coupling
LOW VOLTAGE DIFFERENTIAL SIGNALING RECEIVER
#2POWER EFFICIENT BIDIRECTIONAL DIE-TO-DIE COMMUNICATION SYSTEMS AND METHODS
#3LOW POWER DC-AC COUPLED PRE-AMPLIFIER CIRCUITS FOR HIGH-SPEED LINK RECEIVERS
#4LOW VOLTAGE DIFFERENTIAL SIGNALING RECEIVER
#5Transmission device, reception device, and communication system
#6Receiver systems and methods for AC and DC coupling of receiver
#7Semiconductor circuitry
#8Bidirectional transmission system
#9Buffer circuit
#10Circuits for efficient detection of vector signaling codes for chip-to-chip communication
#11Receiver architecture for digital isolators employing notch filters common mode transient immunity
#12Auxiliary channel transceiving circuit of displayport interface
#13Circuits for efficient detection of vector signaling codes for chip-to-chip communication
#14Three phase and polarity encoded serial interface
#15N-phase phase and polarity encoded serial interface
#16Transmission device, reception device, and communication system
#17Circuits for efficient detection of vector signaling codes for chip-to-chip communication
#18Three phase and polarity encoded serial interface
#19Differential current mode low latency modulation and demodulation for chip-to-chip connection
#20N-phase phase and polarity encoded serial interface
#21MOBILE TERMINAL
#22Three phase and polarity encoded serial interface
#23Specifying a 3-phase or N-phase eye pattern
#24Sensor interface transceiver
#25N-phase phase and polarity encoded serial interface
#26High-speed low power stacked transceiver
#27Differential interface for inter-device communication in a battery management and protection system
#28Sensor interface transceiver
#29AC coupled single-ended LVDS receiving circuit comprising low-pass filter and voltage regulator
#30Three phase and polarity encoded serial interface
#31Common-mode termination within communication systems
#32Communication system and communication terminal
#33Quadrature demodulation with phase shift
#34Three phase and polarity encoded serial interface
#35Adaptive-allocation of I/O bandwidth using a configurable interconnect topology
#36Method for transmitting discrete electric signals
#37Methods and Systems for Reducing Supply and Termination Noise
#38Differential current driving type data transmission system
#39Receiving device for adjusting energy of a received signal sent over a transmission line
#40Multi-mode I/O circuitry supporting low interference signaling schemes for high speed digital interfaces
#41High speed electronic data transmission system
#42Receiver termination circuit for a high speed direct current (DC) serial link
#43Contactless transmission of a differential signal between a transmitter and a receiver
#44Method and system for a second order input intercept point (IIP2) correction
#45Signal waveform equalizer circuit and receiver circuit
#46Threshold control circuitry for multiple current signal receivers
#47Adaptive allocation of I/O bandwidth using a configurable interconnect topology
#48Current mode receiver
#49Interface circuit and signal output adjusting method
#50Three phase and polarity encoded serial interface
#51Transceiver circuit capable of separating hybrid signals by current
#52Reference clock receiver compliant with LVPECL, LVDS and PCI-Express supporting both AC coupling and DC coupling
#53Current mode interface receiver with process insensitive common mode current extraction and the method
#54Semiconductor devices for receiving a current mode signal and methods of operating the same
#55Data receiving circuit with current mirror and data slicer
#56Transmitter circuit, receiver circuit, interface circuit, and electronic instrument
#57Bidirectional current-mode transceiver
#58Systems and methods for transmitting signals across integrated circuit chips
#59Current mode interface for off-chip high speed communication
#60Signal interface
#61Adaptive-allocation of I/O bandwidth using a configurable interconnect topology
#62High resolution CMOS circuit using a marched impedance output transmission line
#63Receiver circuit, differential signal receiver circuit, interface circuit, and electronic instrument
#64Current mode signaling in electronic data processing circuit
#65Differential current driving type transmission system
#66Pseudo differential current mode receiver
#67Transmitter circuit, receiver circuit, interface circuit, and electronic instrument
#68Method and system for process, voltage, and temperature (PVT) measurement and calibration
#69Method and system for a second order input intercept point (IIP2) calibration scheme
#70Method and system for a second order input intercept point (IIP2) correction
#71High-speed, low-power, low-skew, low-voltage differential receiver
#72Receiver for a switched signal on a communication line
#73Adaptive-allocation of I/O bandwidth using a configurable interconnect topology
#74Current transfer logic
#75Method and device for bi-directional half duplex transmission of data
#76Single ended receiver
#77Reducing supply noise in current mode logic transmitters
#78Reducing supply noise in current mode logic transmitters
#79Reducing supply noise in current mode logic transmitters