DEVICE AND COMPUTING SYSTEM INCLUDING THE DEVICE

ELECTRONIC DIGITAL SYSTEM COMPRISING A SERIALIZER DESERIALIZER MODULE, SERIALIZER DESERIALIZER MODULE AND METHOD OF CONTROL

CLOCK AND DATA RECOVERY

INTERFACE DEVICE AND METHOD OF OPERATING THE SAME

SIGNAL GENERATION DEVICE AND SIGNAL GENERATION METHOD

Device and computing system including the device

Data transfer circuit and communication apparatus

Device and computing system including the device

Apparatus and method for providing synchronization information of first communication network to second communication network in communication system

Device and computing system including the device

Method of synchronizing nodes in a determinist mesh network

Drive and data transmission method

Video/audio transmission system, transmission method, transmission device, and reception device

Radio communication

Transmitting device, receiving device, repeating device, and transmission/reception system

System and method for asynchronous, multiple clock domain data streams coalescing and resynchronization

Network packet generator employing multiple header templates and configurable hardware registers

Low-latency pipeline for media-to-ethernet frame packaging

Radio communication repeater, a radio communication system and method

Latency buffer circuit with adaptable time shift

Clocked commands timing adjustments method in synchronous semiconductor integrated circuits

High capacity optical data transmission using intensity-modulation and direct-detection

Method and apparatus for controlling an average fill level of an asynchronous first-in-first-out, FIFO

Sampling rate synchronization between transmitters and receivers

Data phase tracking device, data phase tracking method and communication device

Wafer-level package having one die with its clock source shared by multiple dies and associated clock generating method

Reducing timing uncertainty

Method, apparatus and system for deskewing parallel interface links

Data transmission between asychronous environments

METHOD AND APPARATUS FOR PERFORMING DE-SKEW CONTROL

Changing the clock frequency of a computing device

Reception apparatus and system

Clock domain bridge static timing analysis

Independent UART BRK detection

Method and device for transmitting data on asynchronous paths between domains with different clock frequencies

TURBO DECODING TECHNIQUES

Elastic gear first-in-first-out buffer with frequency monitor

Deskew FIFO buffer with simplified initialization

Oversampling CDR which compensates frequency difference without elasticity buffer

Apparatus and a method for determining a point in time

Oversampling CDR which compensates frequency difference without elasticity buffer

Noise shaped interpolator and decimator apparatus and method

Apparatus and methods for determining latency of a network port

Oversampling CDR which compensates frequency difference without elasticity buffer

Communication system, and corresponding integrated circuit and method

Low latency digital jitter termination for repeater circuits

Noise shaped interpolator and decimator apparatus and method

Rotational synchronizer circuit for metastablity resolution

Methods and apparatus for precision time stamping

Selective insertion of clock mismatch compensation symbols in signal transmissions based on a receiver's compensation capability

Synchronizing receive data over a digital radio frequency (RF) interface

Adaptive clock mismatch compensation symbol insertion in signal transmissions

Data transmission between asynchronous environments

Apparatus and methods for determining latency of a network port

Systems and methods for flow control of a remote transmitter

Methods and apparatus for precision time stamping

Sample rate estimator for digital radio reception systems

Deskew apparatus and method for peripheral component interconnect express

Clock conversion apparatus with an elastic store memory from which data is written in synchronization with a first clock and read out in synchronization with a second clock

System and method for determining a time for safely sampling a signal of a clock domain

Method and device for clock recovery

Clock phase adjustment for a low-latency FIFO

Predictable coding delay over communications networks

System and method for determining a time for safely sampling a signal of a clock domain

Clock domain crossing interface

Burst Mode Clock and Data Recovery Circuit and Method

Apparatus for synchronizing a data handover between a first and second clock domain through FIFO buffering

Systems and methods for flow control of a remote transmitter

Symbol-timing recovery techniques for multi-branch receivers

Method and apparatus for regenerating sampling frequency and then quickly locking signals accordingly

Phase adjustment method, data transmission device, and data transmission system

Noise shaped interpolator and decimator apparatus and method

Data receiver circuit

Smart antenna solution for mobile handset

SUB-RATE SAMPLING IN COHERENT OPTICAL RECEIVERS

Symbol timing synchronization methods and apparatus

Integrated echo canceller and speech codec for voice-over IP(VoIP)

Synchronization of audio and video streams

Adaptive slip double buffer

Clock synchroniser

Asynchronous first in first out interface, method thereof and integrated receiver

Communication system

Asynchronous line interface rate adaptation to the physical layer with synchronous lines at the connection layer

METHOD AND APPARATUS FOR INTEGRATED CLOCK MISMATCH COMPENSATION AND PACKET LOSS CONCEALMENT

Method and apparatus for handling of clock information in serial link ports

Clock synchroniser

Adaptive synchronization circuit

Circuit for correcting an output clock frequency in a receiving device

Cycle slip detection for timing recovery

METHODS AND APPARATUS FOR EXTENDING SHORT RANGE DATA INTERFACES

SYNCHRONIZING TIMING MISMATCH BY DATA DELETION

Synchronizing timing mismatch by data insertion

Data alignment method for arbitrary input with programmable content deskewing info

Receiver and communication system having the same

Controlling asynchronous clock domains to perform synchronous operations

Apparatus and method of elastic buffer control

Data receiver apparatus and data transmitter apparatus

Method and systems for mesochronous communications in multiple clock domains and corresponding computer program product

Synchronous circuit and method for receiving data

Asynchronous line interface rate adaptation to the physical layer with synchronous lines at the connection layer

Controlling asynchronous clock domains to perform synchronous operations

Clock and data recovery circuit and communications apparatus including the clock and data recovery circuit

Combined alignment scrambler function for elastic interface

Asynchronous data buffer

Burst mode clock and data recovery circuit and method

MPEG-2 transport stream packet synchronizer

Rate adaptation

Marking synchronization positions in an elastic store

Clock synchronization of data streams

Event edge synchronization system and method of operation thereof

Circuit comprising mutually asynchronous circuit modules

Process for designing a circuit for synchronizing data asychronously exchanged between two synchronous blocks, and synchronization circuit fabricated by same

Method and system for communicating and processing VOIP packets using a jitter buffer

Method and circuit for transferring data stream across multiple clock domains

Communication system

Egress pointer smoother

Multi-channel fractional clock data transfer

Single stage pointer and overhead processing

Phase-locked loop for maintaining system synchronization through packet dropout

Precise delay alignment between amplitude and phase/frequency modulation paths in a digital polar transmitter

Receiver and method for synchronizing and aligning serial streams

Sampling rate mismatch solution

Method and circuit for differential clock pulse compensation between two clock-pulse systems

Method for controlling asynchronous clock domains to perform synchronous operations

Method and apparatus for selectively deskewing data traveling through a bus

System and method of on-circuit asynchronous communication, between synchronous subcircuits

Method of recovering digital data from a clocked serial input signal and clocked data recovery circuit

Deterministic operation of an input/output interface

Methods and apparatus for recovering serial data

Adaptive play-out buffers and adaptive clock operation in packet networks

Method and apparatus for handling of clock information in serial link ports

Data serializer

Method for reducing latency

Asynchronous system-on-a-chip interconnect

Eye center retraining system and method

Data cleaning with an asynchronous reference clock

Methods and apparatus for asynchronous serial channel connections in communication systems

Traffic delay processing

Data memory extension for use in double buffered TDM switches

Combined alignment scrambler function for elastic interface

Data transmission controller and sampling frequency converter

Dynamic recalibration mechanism for elastic interface

Smart antenna solution for mobile handset

Pleisiochronous repeater system and components thereof

Symbol position detection device and symbol position detection method

Synchronizer for passing data from a first system to a second system

Inverse tracking over two different clock domains

Byte to byte alignment of multi-path data

Latency optimized data alignment racheting scheme

Method and apparatus for ensuring high quality audio playback in a wireless or wired digital audio communication system

Robust and scalable de-skew method

Device and method for synchronous data transmission using reference signal

Apparatus for receiving parallel data and method thereof

Method and apparatus for periodically retraining a serial links interface

Determining a time difference between first and second clock domains

Clock synchroniser

Synchronous/asynchronous bridge circuit for improved transfer of data between two circuits

Asynchronous FIFO apparatus and method for passing data between a first clock domain and a second clock domain and a second clock domain of a data processing apparatus

High-speed serial link clock and data recovery

Noise shaped interpolator and decimator apparatus and method

Data synchronization arrangement

Digital rate converter

Ring buffer management system and ring buffer management method

System and method for data transmission

Method and apparatus for receiving data based on tracking zero crossings

Receiver for spread spectrum communication

Self-adaptive jitter buffer adjustment method for packet-switched network

Re-timer network insertion