224996 ⎘
Arrangements for synchronising receiver with transmitter; Speed or phase control by the received code signals, the signals containing no special synchronisation information extracting the synchronising or clock signal from the received signal spectrum, e.g. by using a resonant or bandpass circuit Self-sustaining, e.g. by tuned delay line and a feedback path to a logical gate
PARTIAL RESPONSE RECEIVER
#2Phase-aligning multiple synthesizers
#3Partial response receiver
#4Phase-aligning multiple synthesizers
#5Device and method for data reception
#6Partial response receiver
#7Read technique for a bus interface system
#8Partial response receiver
#9EQUIPMENT FOR FEMTOCELL TELECOMMUNICATIONS SYSTEM
#10Filter component tuning method
#11Filter component tuning using size adjustment
#12FLY FEEDBACK
#13Unequalized clock data recovery for serial I/O receiver
#14Clock data recovery apparatus and method and phase detector
#15Equipment for femtocell telecommunications system
#16Method to enhance MIPI D-PHY link rate with minimal PHY changes and no protocol changes
#17Clock and data recovery circuit using an injection locked oscillator
#18Partial response receiver
#19Sampling clock adjustment for an analog to digital converter of a receiver
#20Multi-lane N-factorial (N!) and other multi-wire communication systems
#21Symbol clock recovery circuit
#22Clock and data recovery circuit using an injection locked oscillator
#23Unequalized clock data recovery for serial I/O receiver
#24Read technique for a bus interface system
#25Fully digital CMOS based optical receiver
#26CDR circuit and serial communication interface circuit
#27Method to enhance MIPI D-PHY link rate with minimal PHY changes and no protocol changes
#28Apparatus and method for recovering burst-mode pulse width modulation (PWM) and non-return-to-zero (NRZ) data
#29Systems and methods for data rate optimization in a WCAN system with injection-locked clocking
#30Compact and fast N-factorial single data rate clock and data recovery circuits
#31Clock data recovery circuit and wireless module including same
#32Signal multiplexing device
#33Apparatus and method for recovering burst-mode pulse width modulation (PWM) and non-return-to-zero (NRZ) data
#34Equalizing receiver
#35Partial response receiver
#36Communication protocol method and apparatus for a single wire device
#37Communication protocol method and apparatus for a single wire device
#38Asynchronous data recovery methods and apparatus
#39Methods for calibrating gated oscillator and oscillator circuit utilizing the same
#40Partial response receiver
#41Clock extraction device with digital phase lock, requiring no external control
#42CLOCK REPRODUCING APPARATUS
#43Partial response receiver
#44Clock recovery circuit
#45Clock signal recovery device and method for recovering clock signals
#46Partial response receiver
#47Injection locked LC VCO clock deskewing
#48Clock recovery apparatus
#49Communication protocol method and apparatus for a single wire device
#50Clock reproducing apparatus
#51Apparatus and method for calibrating the frequency of a clock and data recovery circuit
#52Partial response receiver with clock data recovery
#53CMOS burst mode clock data recovery circuit using frequency tracking method
#54Partial response receiver
#55Global resistor calibration for transceivers
#56Controller, system, and method for re-establishment of common mode in a transmission driver
#57Noise-shaping time-to-digital converter