San Jose, California
United States
68
2026-06-04
The entities that hold a legal rights for patent applications filed by inventor Schmidt Gerald:
Gerald Schmidt from San Jose, US has applied for patents for these inventions. The list has both pending applications and granted patents:
PROTOCOL INDEPENDENT PROGRAMMABLE SWITCH (PIPS) FOR SOFTWARE DEFINED DATA CENTER NETWORKS
#2 | 2025-11-27METHOD OF USING UNIT VECTORS TO ALLOW EXPANSION AND COLLAPSE OF HEADER LAYERS WITHIN PACKETS FOR ENABLING FLEXIBLE MODIFICATIONS AND AN APPARATUS THEREOF
#3 | 2025-11-20Resource Isolation In A Hardware-Assisted Transport Layer
#4 | 2025-11-13METHOD AND SYSTEM FOR RECONFIGURABLE PARALLEL LOOKUPS USING MULTIPLE SHARED MEMORIES
#5 | 2025-05-15METHOD AND APPARATUS FOR FLEXIBLE AND EFFICIENT ANALYTICS IN A NETWORK SWITCH
#6 | 2024-02-22Hierarchical statisically multiplexed counters and a method thereof
#7 | 2024-02-01Protocol independent programmable switch (PIPS) for software defined data center networks
#8 | 2024-01-18A METHOD OF USING BIT VECTORS TO ALLOW EXPANSION AND COLLAPSE OF HEADER LAYERS WITHIN PACKETS FOR ENABLING FLEXIBLE MODIFICATIONS AND AN APPARATUS THEREOF
#9 | 2023-08-31Apparatus and method of generating lookups and making decisions for packet modifying and forwarding in a software-defined network engine
#10 | 2023-07-06Method and apparatus for flexible and efficient analytics in a network switch
#11 | 2022-12-22Method and system for reconfigurable parallel lookups using multiple shared memories
#12 | 2022-05-19Hierarchical statistically multiplexed counters and a method thereof
#13 | 2022-03-10CHAINED LOOKUPS AND COUNTING IN A NETWORK SWITCH
#14 | 2021-10-21Method of using bit vectors to allow expansion and collapse of header layers within packets for enabling flexible modifications and an apparatus thereof
#15 | 2021-03-04Hierarchical hardware linked list approach for multicast replication engine in a network ASIC
#16 | 2021-02-25Hierarchical statistically multiplexed counters and a method thereof
#17 | 2021-02-04Method and system for reconfigurable parallel lookups using multiple shared memories
#18 | 2020-11-26Protocol independent programmable switch (PIPS) for software defined data center networks
#19 | 2020-11-05Method and apparatus for flexible and efficient analytics in a network switch
#20 | 2020-10-22Apparatus and method of generating lookups and making decisions for packet modifying and forwarding in a software-defined network engine
#21 | 2020-02-06Chained lookups and counting in a network switch
#22 | 2019-05-02Hierarchical hardware linked list approach for multicast replication engine in a network ASIC
#23 | 2018-11-08Hierarchical statistically multiplexed counters and a method thereof
#24 | 2018-09-27Apparatus and method of generating lookups and making decisions for packet modifying and forwarding in a software-defined network engine
#25 | 2018-08-30Method of implementing a network ASIC in a network device
#26 | 2018-07-19Method and system for reconfigurable parallel lookups using multiple shared memories
#27 | 2018-04-12Hierarchical hardware linked list approach for multicast replication engine in a network ASIC
#28 | 2018-04-12Fast hardware switchover in a control path in a network ASIC
#29 | 2018-02-08Protocol independent programmable switch (PIPS) for software defined data center networks
#30 | 2018-01-18Session based packet mirroring in a network ASIC
#31 | 2017-12-21Method and apparatus for table aging in a network switch
#32 | 2017-08-24Method of using bit vectors to allow expansion and collapse of header layers within packets for enabling flexible modifications and an apparatus thereof
#33 | 2017-08-24Method and system for reconfigurable parallel lookups using multiple shared memories
#34 | 2017-08-24Method and system for reconfigurable parallel lookups using multiple shared memories
#35 | 2017-06-29Method of identifying internal destinations of network packets and an apparatus thereof
#36 | 2016-10-27Hierarchical statisically multiplexed counters and a method thereof
#37 | 2016-10-06Systems and methods for timing adjustment of metadata paths in a network switch under timing constraints
#38 | 2016-10-06Approach for logic signal grouping and RTL generation using XML
#39 | 2016-10-06Approach for chip-level flop insertion and verification based on logic interface definition
#40 | 2016-09-22Apparatus and method of generating lookups and making decisions for packet modifying and forwarding in a software-defined network engine
#41 | 2016-09-15System and method for configuring a plurality of registers with soft error detection and low wiring complexity
#42 | 2016-08-25Method and apparatus for generating parallel lookup requests utilizing a super key
#43 | 2016-08-11Reconfigurable interconnect element with local lookup tables shared by multiple packet processing engines
#44 | 2016-07-07Protocol independent programmable switch (PIPS) software defined data center networks
#45 | 2016-05-19Management of an over-subscribed shared buffer
#46 | 2016-04-28Two modes of a configuration interface of a network ASIC
#47 | 2016-04-28Multiple-interrupt propagation scheme in a network ASIC
#48 | 2016-03-24Hierarchical hardware linked list approach for multicast replication engine in a network ASIC
#49 | 2016-03-24Fast hardware switchover in a control path in a network ASIC
#50 | 2016-03-24Multicast replication engine of a network ASIC and methods thereof
#51 | 2016-03-24Session based packet mirroring in a network ASIC
#52 | 2015-12-24Method of identifying internal destinations of networks packets and an apparatus thereof
#53 | 2015-12-24Method of forming a hash input from packet contents and an apparatus thereof
#54 | 2015-12-24Method of extracting data from packets and an apparatus thereof
#55 | 2015-12-24Method of splitting a packet into individual layers for modification and intelligently stitching layers back together after modification and an apparatus thereof
#56 | 2015-12-24Method of using bit vectors to allow expansion and collapse of header layers within packets for enabling flexible modifications and an apparatus thereof
#57 | 2015-12-24Method of using generic modification instructions to enable flexible modifications of packets and an apparatus thereof
#58 | 2015-12-24Method of using a unique packet identifier to identify structure of a packet and an apparatus thereof
#59 | 2015-12-24Method of modifying packets to a generic format for enabling programmable modifications and an apparatus thereof
#60 | 2015-12-24Method of reducing latency in a flexible parser and an apparatus thereof
#61 | 2015-12-17Hierarchical statistically multiplexed counters and a method thereof
#62 | 2015-12-03Method and apparatus for analytics in a network switch
#63 | 2015-12-03Method and apparatus for table aging in a network switch
#64 | 2015-07-02Matrix of on-chip routers interconnecting a plurality of processing engines and a method of routing using thereof
#65 | 2015-07-02Method and system for reconfigurable parallel lookups using multiple shared memories
#66 | 2015-07-02Apparatus and method of generating lookups and making decisions for packet modifying and forwarding in a software-defined network engine
#67 | 2015-07-02Method and apparatus for parallel and conditional data manipulation in a software-defined network processing engine
#68 | 2014-12-18Apparatus and Method for Uniquely Enumerating Paths in a Parse Tree
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