SCOTT WILLIAM JESSEN

THIN FILM RESISTOR MISMATCH IMPROVEMENT USING A SELF-ALIGNED DOUBLE PATTERN (SADP) TECHNIQUE

Integrated circuits having dielectric layers including an anti-reflective coating

IC with matched thin film resistors

Integrated circuits having dielectric layers including an anti-reflective coating

Methods for etching metal interconnect layers

Method of fabricating transistors, including ambient oxidizing after etchings into barrier layers and anti-reflecting coatings

Elongated contacts using litho-freeze-litho-etch process

Metal on elongated contacts

Elongated contacts using litho-freeze-litho-etch process

Alignment to multiple layers

Elongated contacts using litho-freeze-litho-etch process

Methodology of forming CMOS gates on the secondary axis using double-patterning technique

Metal on elongated contacts

Two-track cross-connect in double-patterned structure using rectangular via

NEGATIVE TONE DEVELOP PROCESS WITH PHOTORESIST DOPING

Alignment to multiple layers

Two-track cross-connect in double-patterned structure using rectangular via

Sub-resolution assist feature to improve symmetry for contact hole lithography

Using a center pole illumination scheme to improve symmetry for contact hole lithography

Sub-resolution assist feature to improve symmetry for contact hole lithography

Method for performing place-and-route of contacts and vias in technologies with forbidden pitch requirements