Lorient
France
21
2024-12-12
The entities that hold a legal rights for patent applications filed by inventor Boutillon Emmanuel:
Emmanuel Boutillon from Lorient, FR has applied for patents for these inventions. The list has both pending applications and granted patents:
METHOD FOR A TRANSMITTER TO TRANSMIT A SIGNAL TO A RECEIVER IN A COMMUNICATION SYSTEM, AND CORRESPONDING RECEIVING METHOD, TRANSMITTER, RECEIVER AND COMPUTER PROGRAM
#2 | 2023-06-29Methods and devices for transmitting and receiving non-binary error correcting code words
#3 | 2022-02-03Offset value determination in a check node processing unit for message-passing decoding of non-binary codes
#4 | 2022-01-20ITERATIVE DECODER FOR DECODING A CODE COMPOSED OF AT LEAST TWO CONSTRAINT NODES
#5 | 2021-08-12Check node processing methods and devices with insertion sort
#6 | 2021-06-03Variable node processing methods and devices for message-passing decoding of non-binary codes
#7 | 2021-05-13Simplified check node processing in non-binary LDPC decoder
#8 | 2020-06-04Hybrid architectures for check node processing of extended min-sum (EMS) decoding of non-binary LDPC codes
#9 | 2020-04-23Simplified, presorted, syndrome-based, extended min-sum (EMS) decoding of non-binary LDPC codes
#10 | 2018-05-10Method for controlling a check node of a NB-LDPC decoder and corresponding check node
#11 | 2018-04-26Elementary check node-based syndrome decoding using pre-sorted inputs
#12 | 2018-03-15Elementary check node processing for syndrome computation for non-binary LDPC codes decoding
#13 | 2018-03-08Methods and devices for generating optimized coded modulations
#14 | 2017-11-02Methods and devices for error correcting codes decoding
#15 | 2016-11-17Decoding of non-binary LDPC codes
#16 | 2016-08-18Decoding low-density parity-check maximum-likelihood single-bit messages
#17 | 2016-01-07Low complexity error correction
#18 | 2015-01-01Method for transmitting non binary error correcting code words with CCSK modulation, and corresponding signal and device
#19 | 2012-09-20Method for controlling a basic parity node of a non-binary LDPC code decoder, and corresponding basic parity node processor
#20 | 2006-07-13Behavioral transformations for hardware synthesis and code optimization based on Taylor Expansion Diagrams
#21 | 2005-06-23LDPC decoder, corresponding method, system and computer program
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