Inventor profile of:

Emmanuel Boutillon

City:

Lorient

Country:

France

Published Applications:

21

Last publication date:

2024-12-12

Top Assignees for applications by Emmanuel Boutillon

The entities that hold a legal rights for patent applications filed by inventor Boutillon Emmanuel:

Recent patent applications by Boutillon Emmanuel

Emmanuel Boutillon from Lorient, FR has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2024-12-12
US20240413965A1
Electricity

METHOD FOR A TRANSMITTER TO TRANSMIT A SIGNAL TO A RECEIVER IN A COMMUNICATION SYSTEM, AND CORRESPONDING RECEIVING METHOD, TRANSMITTER, RECEIVER AND COMPUTER PROGRAM

#2 | 2023-06-29
US20230208560A1
Electricity

Methods and devices for transmitting and receiving non-binary error correcting code words

#3 | 2022-02-03
US20220038116A1
Electricity

Offset value determination in a check node processing unit for message-passing decoding of non-binary codes

#4 | 2022-01-20
US20220021400A1
Electricity

ITERATIVE DECODER FOR DECODING A CODE COMPOSED OF AT LEAST TWO CONSTRAINT NODES

#5 | 2021-08-12
US20210250047A1
Electricity

Check node processing methods and devices with insertion sort

#6 | 2021-06-03
US20210167799A1
Electricity

Variable node processing methods and devices for message-passing decoding of non-binary codes

#7 | 2021-05-13
US20210143838A1
Electricity

Simplified check node processing in non-binary LDPC decoder

#8 | 2020-06-04
US20200177203A1
Electricity

Hybrid architectures for check node processing of extended min-sum (EMS) decoding of non-binary LDPC codes

#9 | 2020-04-23
US20200127683A1
Electricity

Simplified, presorted, syndrome-based, extended min-sum (EMS) decoding of non-binary LDPC codes

#10 | 2018-05-10
US20180131395A1
Electricity

Method for controlling a check node of a NB-LDPC decoder and corresponding check node

#11 | 2018-04-26
US20180115323A1
Electricity

Elementary check node-based syndrome decoding using pre-sorted inputs

#12 | 2018-03-15
US20180076830A1
Electricity

Elementary check node processing for syndrome computation for non-binary LDPC codes decoding

#13 | 2018-03-08
US20180069570A1
Electricity

Methods and devices for generating optimized coded modulations

#14 | 2017-11-02
US20170317695A1
Electricity

Methods and devices for error correcting codes decoding

#15 | 2016-11-17
US20160336967A1
Electricity

Decoding of non-binary LDPC codes

#16 | 2016-08-18
US20160241257A1
Electricity

Decoding low-density parity-check maximum-likelihood single-bit messages

#17 | 2016-01-07
US20160006543A1
Electricity

Low complexity error correction

#18 | 2015-01-01
US20150003499A1
Electricity

Method for transmitting non binary error correcting code words with CCSK modulation, and corresponding signal and device

#19 | 2012-09-20
US20120240002A1
Electricity

Method for controlling a basic parity node of a non-binary LDPC code decoder, and corresponding basic parity node processor

#20 | 2006-07-13
US20060156260A1
Physics

Behavioral transformations for hardware synthesis and code optimization based on Taylor Expansion Diagrams

#21 | 2005-06-23
US20050138519A1
Electricity

LDPC decoder, corresponding method, system and computer program

InventorID:

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