Inventor profile of:

Mark A. Gerber

City:

Lucas, Texas

Country:

United States

Published Applications:

22

Last publication date:

2016-04-21

Top Assignees for applications by Mark A. Gerber

The entities that hold a legal rights for patent applications filed by inventor Gerber Mark A.:

Recent patent applications by Gerber Mark A.

Mark A. Gerber from Lucas, US has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2016-04-21
US20160111349A1
Electricity

Packaged semiconductor devices

#2 | 2015-12-24
US20150371963A1
Electricity

SEMICONDUCTOR DEVICE HAVING NON-CIRCULAR CONNECTORS

#3 | 2015-01-08
US20150008583A1
Electricity

Method and structure of packaging semiconductor devices

#4 | 2015-01-08
US20150008566A1
Electricity

METHOD AND STRUCTURE OF PANELIZED PACKAGING OF SEMICONDUCTOR DEVICES

#5 | 2011-07-28
US20110183465A1
Electricity

Array-molded package-on-package having redistribution lines

#6 | 2011-01-20
US20110011424A1
Electricity

Method for exposing and cleaning insulating coats from metal contact surfaces

#7 | 2010-08-05
US20100193944A1
Electricity

Semiconductor flip-chip system having oblong connectors and reduced trace pitches

#8 | 2010-03-25
US20100072600A1
Electricity

FINE-PITCH OBLONG SOLDER CONNECTIONS FOR STACKING MULTI-CHIP PACKAGES

#9 | 2009-12-31
US20090325348A1
Electricity

Method for fine-pitch, low stress flip-chip interconnect

#10 | 2009-10-29
US20090269883A1
Electricity

Controlling flip-chip techniques for concurrent ball bonds in semiconductor devices

#11 | 2009-10-15
US20090258459A1
Electricity

Packaged system of semiconductor chips having a semiconductor interposer

#12 | 2009-03-26
US20090079067A1
Electricity

Method for stacking semiconductor chips

#13 | 2008-12-25
US20080315387A1
Electricity

Semiconductor Package-on-Package System Including Integrated Passive Components

#14 | 2008-12-25
US20080315385A1
Electricity

Array molded package-on-package having redistribution lines

#15 | 2008-10-09
US20080246138A1
Electricity

Packed system of semiconductor chips having a semiconductor interposer

#16 | 2007-11-01
US20070254404A1
Electricity

Semiconductor package-on-package system including integrated passive components

#17 | 2007-10-11
US20070235850A1
Electricity

Packaged system of semiconductor chips having a semiconductor interposer

#18 | 2007-10-04
US20070228543A1
Electricity

Controlling flip-chip techniques for concurrent ball bonds in semiconductor devices

#19 | 2007-09-20
US20070216008A1
Electricity

Low profile semiconductor package-on-package

#20 | 2007-09-13
US20070210426A1
Electricity

Gold-bumped interposer for vertically integrated semiconductor system

#21 | 2007-08-30
US20070200234A1
Electricity

Flip-Chip Device Having Underfill in Controlled Gap

#22 | 2007-07-26
US20070170571A1
Electricity

Low profile semiconductor system having a partial-cavity substrate

InventorID:

1026986 ⎘