David Dice

Reciprocating Locks

Federated Learning by Parameter Permutation

Global Secondary Path Locking Technique Enabling High Read Concurrency For Read-Mostly Workloads

Compact NUMA-aware Locks

Systems and Methods for Performing Concurrency Restriction and Throttling over Contended Locks

SCALABLE RANGE LOCKS

GENERIC CONCURRENCY RESTRICTION

Compact Synchronization in Managed Runtimes

Reader bias based locking technique enabling high read concurrency for read-mostly workloads

Ticket locks with enhanced waiting

Critical Section Speedup Using Help-Enabled Locks

Federated Learning by Parameter Permutation

Systems and Methods for Safely Subscribing to Locks Using Hardware Extensions

System and method for promoting reader groups for lock cohorting

Generic concurrency restriction

Scalable range locks

Reader bias based locking technique enabling high read concurrency for read-mostly workloads

Compact NUMA-aware locks

Ticket locks with enhanced waiting

System and method for acquiring and releasing a lock using compact and scalable mutual exclusion

Adaptive Selection of Source Matrix Version for Matrix Multiply Operations

Systems and methods for performing concurrency restriction and throttling over contended locks

Compact synchronization in managed runtimes

System and method for promoting reader groups for lock cohorting

Generic concurrency restriction

Reader bias based locking technique enabling high read concurrency for read-mostly workloads

Critical section speedup using help-enabled locks

Global secondary path locking technique enabling high read concurrency for read-mostly workloads

Systems and methods for safely subscribing to locks using hardware extensions

Supporting concurrent remove operations and add-to-front operations on a Least Recently Used (LRU) queue

System and method for promoting reader groups for lock cohorting

Generic concurrency restriction

Fine-grained hardware transactional lock elision

Systems and methods for performing concurrency restriction and throttling over contended locks

Supporting concurrent remove operations and add-to-front operations on a least recently used (LRU) queue

System and method for promoting reader groups for lock cohorting

Permuted memory access mapping

Generic concurrency restriction

System and method for promoting reader groups for lock cohorting

Hardware extensions for memory reclamation for concurrent data structures

Techniques for enhancing progress for hardware transactional memory

Systems and methods for performing concurrency restriction and throttling over contended locks

Transactional execution of native methods

System and method for implementing reader-writer locks using hardware transactional memory

Fine-grained hardware transactional lock elision

System and method for mitigating the impact of branch misprediction when exiting spin loops

Systems and methods for adaptive integration of hardware and software lock elision techniques

Systems and methods for safely subscribing to locks using hardware extensions

Method and system for inter-thread communication using processor messaging

Systems and methods for adaptive integration of hardware and software lock elision techniques

System and method for implementing reader-writer locks using hardware transactional memory

Monitoring multiple memory locations for targeted stores in a shared-memory multiprocessor

System and method for implementing scalable contention-adaptive statistics counters

System and method for implementing shared probabilistic counters storing update probability values

System and method for implementing NUMA-aware statistics counters

Supporting targeted stores in a shared-memory multiprocessor system

System and method for implementing NUMA-aware reader-writer locks

System and method for NUMA-aware locking using lock cohorts

System and method for mitigating the impact of branch misprediction when exiting spin loops

Lock-clustering compilation for software transactional memory

Multi-lane concurrent bag for facilitating inter-thread communication

Systems and methods for detecting and tolerating atomicity violations between concurrent code blocks

System and method for enabling turbo mode in a processor

System and method for implementing hierarchical queue-based locks using flat combining

System and method for optimizing a code section by forcing a code section to be executed atomically

Partitioned ticket locks with semi-local spinning

Cache index coloring for virtual-address dynamic allocators

Method and system for providing a current time value

System and method for performing incremental register checkpointing in transactional memory

System and method for tracking references to shared objects using byte-addressable per-thread reference counters

Method and system for optimizing code for a multi-threaded application

Fast and efficient reacquisition of locks for transactional memory systems

Transactional locking with read-write locks in transactional memory systems

Bulk synchronization in transactional memory systems

Facilitating transactional execution through feedback about misspeculation

Advice-based feedback for transactional execution

Concurrency control using slotted read-write locks

Quickly reacquirable locks

System and method for transactional locking using reader-lists

Method and system for inter-thread communication using processor messaging

System and method for reducing transactional abort rates using compiler optimization techniques

Method and system for reducing abort rates in speculative lock elision using contention management mechanisms

Method of mixed lock-free and locking synchronization

System and method for managing contention in transactional memory using global execution data

System and method for reducing serialization in transactional memory using gang release of blocked threads

Method and system for hardware feedback in transactional memory

System and method for integrating best effort hardware mechanisms for supporting transactional memory

System and method for utilizing available best effort hardware mechanisms for supporting transactional memory

Optimistic semi-static transactional memory implementations

System and method for implementing shared scalable nonzero indicators

Efficient implicit privatization of transactional memory

Page-protection based memory access barrier traps

Method and apparatus for executing a long transaction

Globally incremented variable or clock based methods and apparatus to implement parallel transactions

Method and apparatus for switching between per-thread and per-processor resource pools in multi-threaded programs