Inventor profile of:

David Stephen Levitan

City:

Austin, Texas

Country:

United States

Published Applications:

16

Last publication date:

2015-08-06

Top Assignees for applications by David Stephen Levitan

The entities that hold a legal rights for patent applications filed by inventor Levitan David Stephen:

Recent patent applications by Levitan David Stephen

David Stephen Levitan from Austin, US has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2015-08-06
US20150220366A1
Physics

Techniques for mapping logical threads to physical threads in a simultaneous multithreading data processing system

#2 | 2015-02-12
US20150046690A1
Physics

Techniques for selecting a predicted indirect branch address from global and local caches

#3 | 2011-09-01
US20110213951A1
Physics

Storing branch information in an address table of a processor

#4 | 2010-02-25
US20100050178A1
Physics

Method and apparatus to implement software to hardware thread priority

#5 | 2008-11-06
US20080276080A1
Physics

Storing branch information in an address table of a processor

#6 | 2008-09-25
US20080235531A1
Physics

Apparatus and computer program product for testing ability to recover from cache directory errors

#7 | 2007-01-11
US20070011599A1
Physics

Method for testing ability to recover from cache directory errors

#8 | 2006-10-10
US10425064
-

Thread-specific branch prediction by logically splitting branch history tables and predicted target address cache in a simultaneous multithreading processing environment

#9 | 2006-08-17
US20060184778A1
Physics

Fencing off instruction buffer until re-circulation of rejected preceding and branch instructions to avoid mispredict flush

#10 | 2006-08-03
US20060174096A1
Physics

Methods and systems for storing branch information in an address table of a processor

#11 | 2006-08-03
US20060174095A1
Physics

Branch encoding before instruction cache write

#12 | 2006-08-03
US20060174092A1
Physics

Fetch-side instruction dispatch group formation

#13 | 2006-08-03
US20060174091A1
Physics

Instruction grouping history on fetch-side dispatch group formation

#14 | 2006-07-20
US20060161762A1
Physics

Method and logical apparatus for managing processing system resource use for speculative execution

#15 | 2006-05-02
US10424487
-

Cache predictor for simultaneous multi-threaded processor system supporting multiple transactions

#16 | 2006-02-14
US10422653
-

Simultaneous multithread processor with result data delay path to adjust pipeline length for input to respective thread

InventorID:

1068514 ⎘