Elliot John Smith

Semiconductor device with interconnect to source/drain

Front-end-of-line device structure and method of forming such a front-end-of-line device structure

High-voltage transistor device with thick gate insulation layers

Semiconductor devices having silicon/germanium active regions with different germanium concentrations

Semiconductor devices including Si/Ge active regions with different Ge concentrations

SEMICONDUCTOR DEVICE INCLUDING FDSOI TRANSISTORS WITH COMPACT GROUND CONNECTION VIA BACK GATE

Semiconductor devices including self-aligned active regions for planar transistor architecture

Semiconductor device with interconnect to source/drain

Technique and related semiconductor devices based on crystalline semiconductor material formed on the basis of deposited amorphous semiconductor material

Early gate silicidation in transistor elements

Technique for defining active regions of semiconductor devices with reduced lithography effort

High-voltage transistor device with thick gate insulation layers

High voltage transistor using buried insulating layer as gate dielectric

SOI-based floating gate memory cell

Gate structure with dual width electrode layer

Method of forming a semiconductor device structure and semiconductor device structure

METHOD OF FORMING A SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE

Gate patterning for AC and DC performance boost

Semiconductor structure including a first transistor at a semiconductor-on-insulator region and a second transistor at a bulk region and method for the formation thereof

Methods for forming integrated circuits that include a dummy gate structure

Integrated circuit including a dummy gate structure and method for the formation thereof

Semiconductor structure including a trench capping layer

Inline monitoring of transistor-to-transistor critical dimension

Process monitoring for gate cut mask

Semiconductor structure including a trench capping layer and method for the formation thereof

Wafer with SOI structure having a buried insulating multilayer structure and semiconductor device structure

BULEX contacts in advanced FDSOI techniques

Capacitor structure and method of forming a capacitor structure

Method of forming a gate mask for fabricating a structure of gate lines

WAFER-LESS AUTO CLEAN OF PROCESSING CHAMBER