Inventor profile of:

Jason R. Wright

City:

Chandler, Arizona

Country:

United States

Published Applications:

18

Last publication date:

2020-12-17

Top Assignees for applications by Jason R. Wright

The entities that hold a legal rights for patent applications filed by inventor Wright Jason R.:

Recent patent applications by Wright Jason R.

Jason R. Wright from Chandler, US has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2020-12-17
US20200395247A1
Electricity

Method for increasing semiconductor device wafer strength

#2 | 2018-11-01
US20180315734A1
Electricity

Method for making an electronic component package

#3 | 2017-03-30
US20170092567A1
Electricity

Microelectronic packages having mold-embedded traces and methods for the production thereof

#4 | 2015-09-24
US20150270233A1
Electricity

Wafer level packages and methods for producing wafer level packages having delamination-resistant redistribution layers

#5 | 2015-09-17
US20150262931A1
Electricity

Microelectronic packages having mold-embedded traces and methods for the production thereof

#6 | 2015-08-27
US20150243635A1
Electricity

Stacked microelectronic packages having sidewall conductors and methods for the fabrication thereof

#7 | 2015-06-11
US20150162310A1
Electricity

Devices and stacked microelectronic packages with package surface conductors and adjacent trenches and methods of their fabrication

#8 | 2015-04-30
US20150115454A1
Electricity

Microelectronic packages having layered interconnect structures and methods for the manufacture thereof

#9 | 2015-04-02
US20150092377A1
Electricity

Devices and stacked microelectronic packages with in-trench package surface conductors and methods of their fabrication

#10 | 2014-09-18
US20140264945A1
Electricity

Stacked microelectronic packages having sidewall conductors and methods for the fabrication thereof

#11 | 2014-02-27
US20140054797A1
Electricity

Stacked microelectronic packages having sidewall conductors and methods for the fabrication thereof

#12 | 2014-02-27
US20140054796A1
Electricity

Stacked microelectronic packages having patterned sidewall conductors and methods for the fabrication thereof

#13 | 2014-02-27
US20140054783A1
Electricity

Stacked microelectronic packages having sidewall conductors and methods for the fabrication thereof

#14 | 2013-06-20
US20130154091A1
Electricity

SEMICONDUCTOR DEVICE PACKAGING USING ENCAPSULATED CONDUCTIVE BALLS FOR PACKAGE-ON-PACKAGE BACK SIDE COUPLING

#15 | 2013-03-28
US20130078753A1
Electricity

Method for packaging an electronic device assembly having a capped device interconnect

#16 | 2013-02-28
US20130049217A1
Electricity

Semiconductor device packaging having pre-encapsulation through via formation using drop-in signal conduits

#17 | 2012-01-26
US20120021565A1
Electricity

Method of forming a packaged semiconductor device

#18 | 2010-11-04
US20100279467A1
Electricity

Methodology for processing a panel during semiconductor device fabrication

InventorID:

108467 ⎘