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Inventor profile of:

Jin Su PARK

City:

Daegu

Country:

South Korea

Published Applications:

27

Last publication date:

2026-06-04

Top Assignees for applications by Jin Su PARK

The entities that hold a legal rights for patent applications filed by inventor PARK Jin Su:

HYNIX SEMICONDUCTOR INC. 10 Icheon-si, South Korea
HYNIX SEMICONDUCTOR INC. 8 Gyeonggi-do, South Korea
Valeo Kapec Co., Ltd. 3 Daegu, South Korea
HYNIX SEMICONDUCTOR INC. 3 Icheon-si Gyeonggi-do, South Korea
SK HYNIX INC. 2 Gyeonggi-do, South Korea
Hynix Seminconductor Inc. 1 Icheon-si, Gyeounggi-do, South Korea
Hynix Semiconductor Inc. 1 Icheon-shi, South Korea
Hynix Semiconductor Inc. 1 Icheon-si, Kyoungki-do, South Korea
SK hynix Inc. 1 Icheon-si Gyeonggi-do, South Korea
SK HYNIX INC. 1 Icheon-si, South Korea

Recent patent applications by PARK Jin Su

Jin Su PARK from Daegu, KR has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2026-06-04

US20260152053A1

Performing operations; transporting

HYBRID DRIVING MODULE

#2 | 2023-02-09

US20230043913A1

Performing operations; transporting

Hybrid driving module

#3 | 2023-02-09

US20230038832A1

Performing operations; transporting

Hybrid driving module

#4 | 2013-03-28

US20130077373A1

Nonvolatile memory device and operation method thereof

#5 | 2013-02-28

US20130051152A1

Semiconductor memory device and method of operating the same

#6 | 2012-12-13

US20120314506A1

Semiconductor device and method of operating the same

#7 | 2012-11-01

US20120275224A1

Operating method of semiconductor device

#8 | 2012-10-25

US20120268996A1

Semiconductor memory device

#9 | 2012-10-25

US20120268993A1

SEMICONDUCTOR MEMORY DEVICE

#10 | 2012-07-05

US20120170394A1

Column address circuit of semiconductor memory device and method of generating column addresses

#11 | 2012-05-03

US20120106270A1

Semiconductor memory device and method of operating the same

#12 | 2012-01-12

US20120011306A1

Nonvolatile memory device preventing shift in threshold voltage of erase cell and program method thereof

#13 | 2012-01-12

US20120008415A1

Semiconductor memory device and method of erasing the same

#14 | 2012-01-12

US20120008391A1

Voltage switch circuit and nonvolatile memory device using the same

#15 | 2012-01-12

US20120008385A1

Semiconductor memory device and method of operating the same

#16 | 2011-11-10

US20110273944A1

SEMICONDUCTOR MEMORY DEVICE AND METHOD OF OPERATING THE SAME

#17 | 2010-12-30

US20100329036A1

Nonvolatile memory device and reading method to read first memory cell in accordance of data stored in second memory cell adjacent to first memory cell

#18 | 2010-12-30

US20100329030A1

Nonvolatile memory device and method of programming the same

#19 | 2010-12-30

US20100328979A1

Nonvolatile memory device and operation method thereof

#20 | 2010-12-02

US20100302828A1

Addressing circuit of semiconductor memory device and addressing method therefor

#21 | 2009-11-26

US20090290432A1

Method of reading data in a non-volatile memory device

#22 | 2009-07-02

US20090168528A1

Flash memory device and data I/O operation method thereof

#23 | 2008-09-18

US20080225604A1

Semiconductor memory device

#24 | 2008-09-18

US20080225597A1

METHOD OF DETECTING AN UNDER PROGRAM CELL IN A NON-VOLATILE MEMORY DEVICE AND METHOD OF PROGRAMMING THE UNDER PROGRAM CELL USING THE SAME

#25 | 2008-04-03

US20080080257A1

Flash memory device and its reading method

#26 | 2007-11-15

US20070263457A1

Flash memory device and erase method thereof

#27 | 2007-10-25

US20070247928A1

Flash memory device

InventorID:

111751 ⎘