Barraux
France
94
2018-06-07
The entities that hold a legal rights for patent applications filed by inventor Coronel Philippe:
Philippe Coronel from Barraux, FR has applied for patents for these inventions. The list has both pending applications and granted patents:
Method for fabricating auto-aligned interconnection elements for a 3D integrated circuit
#2 | 2018-05-24Method of fabrication of a FET transistor having an overlapped gate
#3 | 2017-11-09Thermal energy harvesting optimization with bistable elements and collaborative behavior
#4 | 2017-08-24Device with deformable shell including an internal piezoelectric circuit
#5 | 2016-12-22Superimposed transistors with auto-aligned active zone of the upper transistor
#6 | 2016-09-29Process for depositing a compact film of particles on the internal surface of a part having a hollow delimited by this internal surface
#7 | 2016-06-02Device with deformable shell including an internal piezoelectric circuit
#8 | 2016-04-21Method for producing interconnections for 3D integrated circuit
#9 | 2016-04-14Method for producing a substrate by spraying particles onto a compact film of solid particles on a carrier liquid
#10 | 2016-03-31Device for converting heat energy into electrical energy with heat-sensitive molecules
#11 | 2016-03-31Method for producing a multilevel microelectronic structure
#12 | 2015-10-29Racket with piezoelectric strings
#13 | 2015-09-03Process for producing a double-gate field-effect device having independent gates
#14 | 2015-08-06Method for forming a film of particles on a carrier liquid, with movement of an inclined ramp for compressing the particles
#15 | 2015-07-16Graphene interposer and method of manufacturing such an interposer
#16 | 2015-04-30System for conversing thermal energy into electrical energy
#17 | 2015-03-26DEVICE FOR CONVERTING HEAT ENERGY INTO MECHANICAL ENERGY WITH IMPROVED EFFICIENCY
#18 | 2015-03-19Integrated circuit chip cooling device
#19 | 2015-02-12Method for depositing particles onto a substrate, including a step of structuring a particle film on a liquid conveyor
#20 | 2015-01-22Thermal energy harvesting optimisation with bistable elements and collaborative behavior
#21 | 2015-01-08Method for depositing a particle film onto a substrate via a liquid conveyor, including a step of structuring the film on the substrate
#22 | 2014-12-25Method for transferring objects onto a substrate using a compact particle film, including a step of producing connectors on the objects
#23 | 2014-12-04Method for transferring objects onto a substrate by means of a compact film of particles
#24 | 2014-09-18Secure thermoelectric device
#25 | 2014-08-21Cooling device equipped with a thermoelectric sensor
#26 | 2014-06-12THERMAL MANAGEMENT SYSTEM WITH VARIABLE-VOLUME MATERIAL
#27 | 2014-05-29Facility and method for depositing a width adjustable film of ordered particles onto a moving substrate
#28 | 2014-01-16Process for monolithic series connection of the photovoltaic cells of a solar module and a photovoltaic module implementing this process
#29 | 2013-12-12Facility and method for depositing a film of ordered particles onto a moving substrate
#30 | 2013-10-03Polymer locally comprising conductive areas
#31 | 2013-05-02Optimized thermoelectric module for operation in peltier mode or in seebeck mode
#32 | 2013-04-25Thermoelectric device which provides for varying the effective height of the contacts of a thermocouple, and method for manufacturing the device
#33 | 2013-04-25Modulatable thermoelectric device
#34 | 2013-02-28Device forming a manometer intended for measuring biphasic fluid pressure, associated method of manufacture and fluidic network
#35 | 2012-12-20Microbattery and method for manufacturing same
#36 | 2012-11-22Stand-Alone Water Detection Device That Includes a Hydrogen Source
#37 | 2012-10-18ELECTRICAL GENERATOR USING THE THERMOELECTRIC EFFECT AND TWO CHEMICAL REACTIONS, I.E. EXOTHERMIC AND ENDOTHERMIC REACTIONS, TO GENERATE AND DISSIPATE HEAT, RESPECTIVELY
#38 | 2012-08-09Organic dual-gate memory and method for producing same
#39 | 2012-04-05Producing a deformable system with a view to displacing an object enclosed in the latter
#40 | 2012-03-22Method for eliminating the metal catalyst residues on the surface of wires produced by catalytic growth
#41 | 2011-12-29Substrate provided with a semi-conducting area associated with two counter-electrodes and device comprising one such substrate
#42 | 2011-12-08Compact field effect transistor with counter-electrode and fabrication method
#43 | 2011-12-01SRAM memory cell with four transistors provided with a counter-electrode
#44 | 2011-06-23Hybrid substrate with improved isolation and simplified method for producing a hybrid substrate
#45 | 2011-06-16Method for producing a three-dimensionally controlled surface coating in a cavity
#46 | 2011-05-12Method for producing field effect transistors with a back gate and semiconductor device
#47 | 2011-03-10Method for producing a field effect device having self-aligned electrical connections with respect to the gate electrode
#48 | 2011-01-20Manufacturing method for planar independent-gate or gate-all-around transistors
#49 | 2010-12-09Method for forming an integrated circuit level by sequential tridimensional integration
#50 | 2010-09-16PROCESS FOR PRODUCING AN MOS TRANSISTOR AND CORRESPONDING INTEGRATED CIRCUIT
#51 | 2010-08-12Process for forming a wire portion in an integrated electronic circuit
#52 | 2010-07-22Method for manufacturing a transistor with parallel semiconductor nanofingers
#53 | 2010-04-29FinFET with two independent gates and method for fabricating the same
#54 | 2010-04-22Method for producing stacked and self-aligned components on a substrate
#55 | 2010-02-04Process for producing a contact pad on a region of an integrated circuit, in particular on the electrodes of a transistor
#56 | 2009-12-17SOI transistor with self-aligned ground plane and gate and buried oxide of variable thickness
#57 | 2009-10-15Integrated circuit comprising mirrors buried at different depths
#58 | 2009-09-10MOS transistor manufacturing
#59 | 2009-08-27Method of manufacturing a buried-gate semiconductor device and corresponding integrated circuit
#60 | 2009-08-27Method of fabricating a buried-gate semiconductor device and corresponding integrated circuit
#61 | 2009-04-09Method of producing an asymmetric architecture semi-conductor device
#62 | 2009-01-15IMAGE SENSOR WITH AN IMPROVED SENSITIVITY
#63 | 2008-10-16Realization of self-positioned contacts by epitaxy
#64 | 2008-08-28Assembly of two parts of an integrated electronic circuit
#65 | 2008-07-24MOSFET on SOI device
#66 | 2008-04-17Manufacturing method of semiconductor-on-insulator region structures
#67 | 2008-01-24Back-lit image sensor with a uniform substrate temperature
#68 | 2007-12-06Transistor and fabrication process
#69 | 2007-12-06Component containing a baw filter
#70 | 2007-11-29Formation of shallow siGe conduction channel
#71 | 2007-08-23Transistor device with two planar gates and fabrication process
#72 | 2007-07-05Method for forming under a thin layer of a first material portions of another material and/or empty areas
#73 | 2007-05-31MOS transistor manufacturing
#74 | 2007-05-08Electronic components and method of fabricating the same
#75 | 2007-03-13Process for forming portions of a compound material inside a cavity
#76 | 2007-02-15Process for producing an MOS transistor and corresponding integrated circuit
#77 | 2007-01-25Three-gate transistor structure
#78 | 2006-12-21Method for the formation of an integrated electronic circuit having a closed cavity
#79 | 2006-12-14Production of two superposed elements within an integrated electronic circuit
#80 | 2006-11-28High-density MOS transistor
#81 | 2006-06-22SRAM cell
#82 | 2006-06-22SRAM cell
#83 | 2006-05-09Process for producing an integrated electronic component
#84 | 2006-05-04Process for producing a contact pad on a region of an integrated circuit, in particular on the electrodes of a transistor
#85 | 2005-11-29Surround-gate semiconductor device encapsulated in an insulating medium
#86 | 2005-09-29Conductive lines buried in insulating areas
#87 | 2005-09-01Method for forming a strongly-conductive buried layer in a semiconductor substrate
#88 | 2005-06-28Method for forming contact openings on a MOS integrated circuit
#89 | 2005-06-21RAM
#90 | 2005-04-21Manufacturing method of semiconductor-on-insulator region structures
#91 | 2005-04-21Method for producing a field effect transistor
#92 | 2005-02-17Method for forming, under a thin layer of a first material, portions of another material and/or empty areas
#93 | 2005-02-03Conductive lines buried in insulating areas
#94 | 2005-01-25Integrated circuit comprising an auxiliary component, for example a passive component or a microelectromechanical system, placed above an electronic chip, and the corresponding fabrication process
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