Benoît FEIX

City:

Aubagne

Country:

France

Published Applications:

Last publication date:

2019-02-21

Top Assignees for applications by Benoît FEIX

The entities that hold a legal rights for patent applications filed by inventor FEIX Benoît:

INSIDE SECURE 3 MEYREUIL, France
INSIDE CONTACTLESS 2 Aix-en-Provence, France
INSIDE SECURE 1 Aix-en-Provence Cedex 3, France
INSIDE CONTACTLESS 1 Aix-en-Provence Cedex, France
INSIDE CONTACTLESS 1 Aix enProvence Cedex 3, France
INSIDE SECURE 1 Aix-en-Provence, France
Eshard 1 Martillac, France
INSIDE SECURE 1 Aix-en-Provence Cedex, France

Recent patent applications by FEIX Benoît

Benoît FEIX from Aubagne, FR has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2019-02-21

US20190057228A1

Physics

Testing resistance of a circuit to a side channel analysis

#2 | 2015-11-26

US20150339102A1

Physics

Cryptography method comprising an operation of multiplication by a scalar or an exponentiation

#3 | 2014-12-04

US20140358980A1

Physics

Method of generating proven prime numbers suitable for being implemented in a smart card

#4 | 2014-12-04

US20140355758A1

Electricity

Method of generating prime numbers proven suitable for chip cards

#5 | 2014-11-27

US20140351603A1

Physics

ENCRYPTION PROCESS PROTECTED AGAINST SIDE CHANNEL ATTACKS

#6 | 2013-02-28

US20130055025A1

Physics

MICROPROCESSOR PROTECTED AGAINST MEMORY DUMP

#7 | 2012-08-30

US20120221618A1

Physics

ENCRYPTION METHOD COMPRISING AN EXPONENTIATION OPERATION

#8 | 2011-10-06

US20110246789A1

Physics

Integrated circuit protected against horizontal side channel analysis

#9 | 2011-10-06

US20110246119A1

Physics

Process for testing the resistance of an integrated circuit to a side channel analysis

#10 | 2010-11-11

US20100287386A1

Electricity

SECURE INTEGRATED CIRCUIT COMPRISING MEANS FOR DISCLOSING COUNTERPART MASK VALUES

InventorID:

119584 ⎘