Inventor profile of:

Andreas Arp

City:

Nufringen

Country:

Germany

Published Applications:

17

Last publication date:

2020-05-07

Top Assignees for applications by Andreas Arp

The entities that hold a legal rights for patent applications filed by inventor Arp Andreas:

Recent patent applications by Arp Andreas

Andreas Arp from Nufringen, DE has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2020-05-07
US20200142443A1
Physics

Integrated skew control

#2 | 2020-02-06
US20200044636A1
Electricity

Method and apparatus for clock skew control with low jitter in an integrated circuit

#3 | 2019-09-12
US20190280680A1
Electricity

Skew control

#4 | 2019-07-18
US20190222206A1
Electricity

Method and apparatus for clock skew control with low jitter in an integrated circuit

#5 | 2019-03-28
US20190097618A1
Electricity

Correcting duty cycle and compensating for active clock edge shift

#6 | 2019-03-28
US20190097617A1
Electricity

Correcting duty cycle and compensating for active clock edge shift

#7 | 2018-11-15
US20180331676A1
Electricity

Skew control

#8 | 2018-11-15
US20180329448A1
Physics

Integrated skew control

#9 | 2018-11-08
US20180323773A1
Electricity

Method and apparatus for clock skew control with low jitter in an integrated circuit

#10 | 2018-08-02
US20180219539A1
Electricity

On-chip waveform measurement

#11 | 2018-08-02
US20180219538A1
Electricity

On-chip waveform measurement

#12 | 2018-03-08
US20180069540A1
Electricity

Method and apparatus for clock skew control with low jitter in an integrated circuit

#13 | 2015-06-18
US20150171834A1
Electricity

Duty cycle adjustment with error resiliency

#14 | 2015-01-20
US14101509
Physics

Method and apparatus for detecting rising and falling transitions of internal signals of an integrated circuit

#15 | 2014-12-16
US14018831
-

Method and apparatus for detecting rising and falling transitions of internal signals of an integrated circuit

#16 | 2013-10-22
US13623230
-

Automation of interconnect and routing customization

#17 | 2009-01-29
US20090031274A1
Physics

Computer readable medium, system and associated method for designing integrated circuits with loop insertions

InventorID:

1200610 ⎘