Williston, Vermont
United States
50
2025-11-06
The entities that hold a legal rights for patent applications filed by inventor Levy Mark D.:
Mark D. Levy from Williston, US has applied for patents for these inventions. The list has both pending applications and granted patents:
PHOTONIC INTEGRATED CIRCUIT INCLUDING PLURALITY OF DISCRETE OPTICAL GUARD ELEMENTS
#2 | 2025-05-01HIGH ELECTRON MOBILITY TRANSISTOR WITH REGROWN BARRIER STRUCTURE
#3 | 2025-05-01DEVICE WITH ISOLATION STRUCTURES
#4 | 2025-04-10HIGH ELECTRON MOBILITY TRANSISTOR
#5 | 2025-04-10HIGH-ELECTRON-MOBILITY TRANSISTOR
#6 | 2025-03-13STRUCTURE AND METHOD TO PROVIDE DIELECTRIC LAYER HAVING PLURALITY OF RECESSES WITH DIFFERENT DEPTHS
#7 | 2025-02-27TRANSISTOR WITH THERMAL PLUG
#8 | 2025-01-30HIGH-ELECTRON-MOBILITY TRANSISTOR
#9 | 2024-12-31Multi-channel transistor
#10 | 2024-11-26Structure including multi-level field plate and method of forming the structure
#11 | 2024-07-11SEAL RING STRUCTURES
#12 | 2024-06-20ENHANCEMENT MODE TRANSISTOR WITH A ROBUST GATE AND METHOD
#13 | 2024-06-13BIDIRECTIONAL DEVICE
#14 | 2024-06-13FUSE STRUCTURE WITH METAL HEATER AND HEAT SPREADING STRUCTURE FOR FUSE BODY
#15 | 2024-06-06HIGH-ELECTRON-MOBILITY TRANSISTOR
#16 | 2024-05-16STRUCTURES WITH BURIED FLUIDIC CHANNELS
#17 | 2024-04-18DEVICE WITH FIELD PLATES
#18 | 2024-04-18ION-SENSITIVE FIELD EFFECT TRANSISTOR ABOVE MICROFLUIDIC CAVITY FOR ION DETECTION AND IDENTIFICATION
#19 | 2024-03-21PHOTONIC INTEGRATED CIRCUIT INCLUDING PLURALITY OF DISCRETE OPTICAL GUARD ELEMENTS
#20 | 2024-02-29SEMICONDUCTOR STRUCTURE WITH FRONTSIDE PORT AND CAVITY FEATURES FOR CONVEYING SAMPLE TO SENSING ELEMENT
#21 | 2024-01-04DEVICE OVER PATTERNED BURIED POROUS LAYER OF SEMICONDUCTOR MATERIAL
#22 | 2023-12-28Semiconductor structure including photodiode-based fluid sensor and methods
#23 | 2023-12-21MICROFLUIDIC CHANNEL STRUCTURE AND METHOD
#24 | 2023-11-02BIPOLAR JUNCTION TRANSISTOR
#25 | 2023-10-12FIELD EFFECT TRANSISTOR WITH BURIED FLUID-BASED GATE AND METHOD
#26 | 2023-07-13MIDDLE OF THE LINE HEATER AND METHODS
#27 | 2023-06-29Transistor with multi-level self-aligned gate and source/drain terminals and methods
#28 | 2023-06-15SWITCHES IN BULK SUBSTRATE
#29 | 2023-06-08Unlanded thermal dissipation pillar adjacent active contact
#30 | 2023-04-20DEVICE WITH DUAL ISOLATION STRUCTURE
#31 | 2023-02-09Gate structures with air gap isolation features
#32 | 2023-02-02Integrated circuit structure with through-metal through-substrate interconnect and method
#33 | 2022-12-01Field effect transistor
#34 | 2022-11-03Switches in bulk substrate
#35 | 2022-09-15Photodetectors used with broadband signal
#36 | 2022-07-28Airgap structures in auto-doped region under one or more transistors
#37 | 2022-07-14Transistor with multi-level self-aligned gate and source/drain terminals and methods
#38 | 2022-06-16HEAT SPREADING ISOLATION STRUCTURE FOR SEMICONDUCTOR DEVICES
#39 | 2022-06-16Ultralow-K dielectric-gap wrapped contacts and method
#40 | 2022-06-02Waveguide with attenuator
#41 | 2022-05-19Photodetector array with diffraction gratings having different pitches
#42 | 2022-02-17Structure with polycrystalline active region fill shape(s), and related method
#43 | 2022-02-17Bulk semiconductor structure with a multi-level polycrystalline semiconductor region and method
#44 | 2022-01-27Photodiode and/or pin diode structures
#45 | 2021-12-16Photodiode and/or pin diode structures with one or more vertical surfaces
#46 | 2021-12-02Photodiode and/or PIN diode structures
#47 | 2021-11-11Photodetector with reflector with air gap adjacent photodetecting region
#48 | 2021-10-19Structure with polycrystalline isolation region below polycrystalline fill shape(s) and selective active device(s), and related method
#49 | 2021-10-14Avalanche photodiode
#50 | 2015-12-17Silicon waveguide structure with arbitrary geometry on bulk silicon substrate, related systems and program products
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