Folsom, California
United States
47
2026-05-14
The entities that hold a legal rights for patent applications filed by inventor Cui Mingdong:
Mingdong Cui from Folsom, US has applied for patents for these inventions. The list has both pending applications and granted patents:
WORD LINE DRIVERS FOR MULTIPLE-DIE MEMORY DEVICES
#2 | 2026-03-12PRE-DECODER CIRCUITRY
#3 | 2026-01-29MICROELECTRONIC DEVICES INCLUDING CRUCIFORM CONTACT STRUCTURES, AND RELATED METHODS AND ELECTRONIC SYSTEMS
#4 | 2025-10-30PRE-DECODER CIRCUITRY
#5 | 2025-08-21WORD LINE DRIVERS FOR MULTIPLE-DIE MEMORY DEVICES
#6 | 2025-05-29STRUCTURES FOR WORD LINE MULTIPLEXING IN THREE-DIMENSIONAL MEMORY ARRAYS
#7 | 2025-04-10STRUCTURES FOR WORD LINE MULTIPLEXING IN THREE-DIMENSIONAL MEMORY ARRAYS
#8 | 2025-01-02Word line drivers for multiple-die memory devices
#9 | 2024-11-28CELL VOLTAGE DROP COMPENSATION CIRCUIT
#10 | 2024-09-12PRE-DECODER CIRCUITRY
#11 | 2024-08-15WORD LINE DRIVERS FOR MULTIPLE-DIE MEMORY DEVICES
#12 | 2024-08-08PRE-DECODER CIRCUITRY
#13 | 2024-06-13WORD LINE DRIVERS FOR MEMORY DEVICES
#14 | 2024-02-29WORD LINE DRIVERS FOR MULTIPLE-DIE MEMORY DEVICES
#15 | 2024-02-29Word line drivers for multiple-die memory devices
#16 | 2024-02-29Word line drivers for multiple-die memory devices
#17 | 2024-02-29Structures for word line multiplexing in three-dimensional memory arrays
#18 | 2024-02-29Structures for word line multiplexing in three-dimensional memory arrays
#19 | 2023-12-07Cell voltage drop compensation circuit
#20 | 2023-12-07Pre-decoder circuitry
#21 | 2023-12-07Pre-decoder circuity
#22 | 2023-04-13Boost-assisted memory cell selection in a memory array
#23 | 2022-12-29Refresh operation of a memory cell
#24 | 2022-12-29Conditional Drift Cancellation Operations in Programming Memory Cells to Store Data
#25 | 2022-03-24Data-based polarity write operations
#26 | 2022-03-10Selective inhibition of memory
#27 | 2021-11-25Read spike mitigation in integrated circuit memory
#28 | 2021-11-18Refresh operation of a memory cell
#29 | 2021-11-04Voltage drivers with reduced power consumption during polarity transition
#30 | 2021-10-07Mux decoder with polarity transition capability
#31 | 2021-05-20Techniques for applying multiple voltage pulses to select a memory cell
#32 | 2021-05-20Voltage profile for reduction of read disturb in memory cells
#33 | 2021-05-06Timing control of voltage supply during polarity transition
#34 | 2021-05-06Mux decoder with polarity transition capability
#35 | 2021-04-22Voltage drivers with reduced power consumption during polarity transition
#36 | 2021-04-22Read spike mitigation in integrated circuit memory
#37 | 2021-04-22Two-stage signaling for voltage driver coordination in integrated circuit memory devices
#38 | 2021-01-07Techniques for applying multiple voltage pulses to select a memory cell
#39 | 2020-11-24Timing control of voltage supply during polarity transition
#40 | 2020-10-27Two-stage signaling for voltage driver coordination in integrated circuit memory devices
#41 | 2019-11-07Boosted high-speed level shifter
#42 | 2019-08-27Boosted high-speed level shifter
#43 | 2019-03-14Apparatuses and methods for current limitation in threshold switching memories
#44 | 2018-03-29Apparatuses and methods for current limitation in threshold switching memories
#45 | 2017-07-13Apparatuses and methods for current limitation in threshold switching memories
#46 | 2017-04-18Apparatuses and methods for current limitation in threshold switching memories
#47 | 2016-05-19Reference voltage generators and sensing circuits
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