BERNARD C. DRERUP

Using idle caches as a backing store for boot code

Controlling issue rates of requests of varying broadcast scopes in a data processing system

Targeting of lateral castouts in a data processing system

Speculative delivery of data from a lower level of a memory hierarchy in a data processing system

Distribution of injected data among caches of a data processing system

Data processing system having masters that adapt to agents with differing retry behaviors

Cache data replacement in a networked computing system using reference states based on reference attributes

Cache line replacement using reference states based on data reference attributes

Split transaction coherency protocol in a data processing system

Prefetch performance

Prefetch performance

Counter-based victim selection in a cache memory

Counter-based victim selection in a cache memory

Hybrid replacement policy in a multilevel cache memory hierarchy

Counter-based victim selection in a cache memory

Counter-based victim selection in a cache memory

Injection of at least a partial cache line in a private multilevel cache hierarchy

Push instruction for pushing a message payload from a sending thread to a receiving thread

Push instruction for pushing a message payload from a sending thread to a receiving thread

Non-serialized push instruction for pushing a message payload from a sending thread to a receiving thread

Non-serialized push instruction for pushing a message payload from a sending thread to a receiving thread

Hardware-assisted interthread push communication

Hardware-assisted interthread push communication

Collective acceleration unit tree structure

Collective acceleration unit tree structure

Collective acceleration unit tree flow control and retransmit

Synchronization optimized queuing system

Dynamic routing based on information of not responded active source requests quantity received in broadcast heartbeat signal and stored in local data structure for other processor chips

Performing dynamic request routing based on broadcast queue depths

Structure for piggybacking multiple data tenures on a single data bus grant to achieve higher bus utilization

Method of piggybacking multiple data tenures on a single data bus grant to achieve higher bus utilization

Cluster-wide system clock in a multi-tiered full-graph interconnect architecture

System for providing a cluster-wide system clock in a multi-tiered full-graph interconnect architecture

Descriptor prefetch mechanism for high latency and out of order DMA device

Barrier and interrupt mechanism for high latency and out of order DMA device

Selective snooping by snoop masters to locate updated data

Method for performing a direct memory access block move in a direct memory access device

Selective snooping by snoop masters to locate updated data

Reducing snoop response time for snoopers without copies of requested data via snoop filtering

Method and apparatus for bus access allocation

Single request data transfer regardless of size and alignment

Single request data transfer regardless of size and alignment

Reducing latency of a snoop tenure

Transfer request pipeline throttling