Inventor profile of:

Joerg Grosse

City:

Munich

Country:

Germany

Published Applications:

13

Last publication date:

2021-03-11

Top Assignees for applications by Joerg Grosse

The entities that hold a legal rights for patent applications filed by inventor Grosse Joerg:

Recent patent applications by Grosse Joerg

Joerg Grosse from Munich, DE has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2021-03-11
US20210073113A1
Physics

Scheduling of scenario models for execution within different computer threads and scheduling of memory regions for use with the scenario models

#2 | 2019-12-26
US20190391204A1
Physics

Testing SoC with portable scenario models and at different levels

#3 | 2019-10-17
US20190317147A1
Physics

Scheduling of scenario models for execution within different computer threads and scheduling of memory regions for use with the scenario models

#4 | 2018-12-20
US20180364298A1
Physics

SYSTEM AND METHOD FOR FORMAL CIRCUIT VERIFICATION

#5 | 2018-05-17
US20180136277A1
Physics

Scheduling of scenario models for execution within different computer threads and scheduling of memory regions for use with the scenario models

#6 | 2017-09-28
US20170276727A1
Physics

Testing SOC with portable scenario models and at different levels

#7 | 2017-08-10
US20170227603A1
Physics

Scheduling of scenario models for execution within different computer threads and scheduling of memory regions for use with the scenario models

#8 | 2016-09-15
US20160266203A1
Physics

Display in a graphical format of test results generated using scenario models

#9 | 2016-07-21
US20160209469A1
Physics

Scheduling of scenario models for execution within different computer threads and scheduling of memory regions for use with the scenario models

#10 | 2016-07-07
US20160196197A1
Physics

Testing SoC with portable scenario models and at different levels

#11 | 2015-10-22
US20150302126A1
Physics

Testing SOC with portable scenario models and at different levels

#12 | 2015-10-22
US20150302120A1
Physics

Display in a graphical format of test results generated using scenario models

#13 | 2015-10-22
US20150301108A1
Physics

Scheduling of scenario models for execution within different computer threads and scheduling of memory regions for use with the scenario models

InventorID:

1586639 ⎘