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Inventor profile of:

MENGCHEN YANG

City:

Beijing

Country:

China

Published Applications:

26

Last publication date:

2025-11-20

Top Assignees for applications by MENGCHEN YANG

The entities that hold a legal rights for patent applications filed by inventor YANG MENGCHEN:

Shanghai Zhaoxin Semiconductor Co., Ltd. 20 Shanghai, China
VIA Alliance Semiconductor Co., Ltd. 3 Shanghai, China

Recent patent applications by YANG MENGCHEN

MENGCHEN YANG from Beijing, CN has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2025-11-20

US20250355651A1

COMMAND PROCESSING METHOD AND COMMAND PROCESSING DEVICE

#2 | 2024-05-23

US20240168760A1

Efficient instruction translation method, and processor

#3 | 2024-01-11

US20240012650A1

METHOD AND PROCESSOR FOR EXECUTING TARGET INSTRUCTIONS

#4 | 2024-01-11

US20240012649A1

INSTRUCTION CONVERSION METHOD, INSTRUCTION CONVERSION SYSTEM, AND PROCESSOR

#5 | 2024-01-04

US20240004658A1

Instruction simulation device and method thereof

#6 | 2023-10-19

US20230333853A1

Method and system for executing new instructions

#7 | 2023-06-01

US20230169004A1

Cache memory device and data cache method

#8 | 2022-06-30

US20220206815A1

System for executing new instructions and method for executing new instructions

#9 | 2022-06-30

US20220206813A1

Method and system for executing new instructions

#10 | 2022-06-30

US20220206812A1

Method and system for converting instructions

#11 | 2022-06-30

US20220206811A1

Method and system for executing new instructions

#12 | 2022-06-30

US20220206810A1

System for executing new instructions and method for executing new instructions

#13 | 2022-06-30

US20220206809A1

METHOD AND SYSTEM FOR EXECUTING NEW INSTRUCTIONS

#14 | 2022-06-30

US20220206808A1

Method and system for executing new instructions

#15 | 2022-06-30

US20220206807A1

Method of converting extended instructions based on an emulation flag and retirement of corresponding microinstructions, device and system using the same

#16 | 2022-06-30

US20220206806A1

Instruction simulation device and method thereof

#17 | 2022-06-30

US20220206794A1

System for executing new instructions and method for executing new instructions

#18 | 2022-05-05

US20220137966A1

Processor and operating method thereof for renaming destination logical register of move instruction

#19 | 2021-10-14

US20210318882A1

Microprocessor with multi-step ahead branch predictor and having a fetch-target queue between the branch predictor and instruction cache

#20 | 2021-10-14

US20210318881A1

Flushing in a microprocessor with multi-step ahead branch predictor and a fetch target queue

#21 | 2021-10-07

US20210311744A1

Microprocessor with multistep-ahead branch predictor

#22 | 2019-09-19

US20190286974A1

PROCESSING CIRCUIT AND NEURAL NETWORK COMPUTATION METHOD THEREOF

#23 | 2018-12-27

US20180373539A1

System and method of merging partial write results for resolving renaming size issues

#24 | 2018-05-22

US15673736

Methods for accelerating hash-based compression and apparatuses using the same

#25 | 2018-03-06

US15673649

Methods for accelerating hash-based compression and apparatuses using the same

#26 | 2016-09-15

US20160266906A1

System and method of reissue parking for a microprocessor

InventorID:

1650694 ⎘