Inventor profile of:

Mark Luttrell

City:

Cedar Park, Texas

Country:

United States

Published Applications:

16

Last publication date:

2025-04-01

Top Assignees for applications by Mark Luttrell

The entities that hold a legal rights for patent applications filed by inventor Luttrell Mark:

Recent patent applications by Luttrell Mark

Mark Luttrell from Cedar Park, US has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2025-04-01
US17894134
Electricity

Dynamic destination id in an array level network of a reconfigurable dataflow processor

#2 | 2022-05-19
US20220156213A1
Physics

Independent control of multiple concurrent application graphs in a reconfigurable data processor

#3 | 2022-03-17
US20220083499A1
Physics

Efficient deconfiguration of a reconfigurable data processor

#4 | 2022-02-24
US20220058034A1
Physics

Runtime patching of configuration files

#5 | 2021-06-17
US20210182021A1
Physics

Computational units for element approximation

#6 | 2021-03-04
US20210064568A1
Physics

Sigmoid function in hardware and a reconfigurable data processor including same

#7 | 2021-02-25
US20210055940A1
Physics

Configuration of a reconfigurable data processor using sub-files

#8 | 2020-08-13
US20200257643A1
Physics

Virtualization of a reconfigurable data processor

#9 | 2020-07-30
US20200241844A1
Physics

Matrix normal/transpose read and a reconfigurable data processor including same

#10 | 2020-07-09
US20200218683A1
Physics

Virtualization of a reconfigurable data processor

#11 | 2020-05-21
US20200159692A1
Physics

Configuration unload of a reconfigurable data processor

#12 | 2020-05-21
US20200159544A1
Physics

Configuration load of a reconfigurable data processor

#13 | 2020-03-05
US20200073835A1
Physics

Distributed fairness protocol for interconnect networks

#14 | 2018-08-09
US20180225239A1
Physics

Distributed fairness protocol for interconnect networks

#15 | 2016-11-10
US20160328209A1
Physics

Storage, access, and management of random numbers generated by a central random number generator and dispensed to hardware threads of cores

#16 | 2016-10-27
US20160314069A1
Physics

Non-temporal write combining using cache resources

InventorID:

1693297 ⎘