Robert B. Staszewski

Phase domain calculator clock, ALU, memory, register file, sequencer, latches

Software reconfigurable digital phase lock loop architecture

ASIP with reconfigurable circuitry implementing atomic operations of a PLL

Digital phase locked loop

Fine-grained gear-shifting of a digital phase-locked loop (PLL)

Linearization and calibration predistortion of a digitally controlled power amplifier

Radio frequency built-in self test for quality monitoring of local oscillator and transmitter

Predistortion calibration and built in self testing of a radio frequency power amplifier using subharmonic mixing

MINIMIZATION OF RMS PHASE ERROR IN A PHASE LOCKED LOOP BY DITHERING OF A FREQUENCY REFERENCE

Method and apparatus for asynchronous clock retiming

Digital amplitude modulation

All-digital frequency synthesis with DCO gain calculation

Sampling mixer with asynchronous clock and signal domains

All-digital frequency synthesis with DCO gain calculation

Digital amplitude modulation

PREDISTORTION MECHANISM FOR COMPENSATION OF TRANSISTOR SIZE MISMATCH IN A DIGITAL POWER AMPLIFIER

UPSAMPLING/INTERPOLATION AND TIME ALIGNMENT MECHANISM UTILIZING INJECTION OF HIGH FREQUENCY NOISE

Simultaneous multiple signal reception and transmission using frequency multiplexing and shared processing

Computation spreading utilizing dithering for spur reduction in a digital phase lock loop

Bandwidth reduction mechanism for polar modulation

Predistortion calibration in a transceiver assembly

Direct radio frequency (RF) sampling with recursive filtering method

Computation parallelization in software reconfigurable all digital phase lock loop

All-digital frequency synthesis with non-linear differential term for handling frequency perturbations

Second-Order Polynomial, Interpolation-Based, Sampling Rate Converter and Method and Transmitters Employing the Same

Transmit filter

Hybrid stochastic gradient based digitally controlled oscillator gain Kestimation

PHASE ALIGNMENT MECHANISM FOR MINIMIZING THE IMPACT OF INTEGER-CHANNEL INTERFERENCE IN A PHASE LOCKED LOOP

Variable delay oscillator buffer

Oscillator system, method of providing a resonating signal and a communications system employing the same

Software reconfigurable digital phase lock loop architecture

Computation spreading for spur reduction in a digital phase lock loop

Adaptive spectral noise shaping to improve time to digital converter quantization resolution using dithering

Single-electron injection/extraction device for a resonant tank circuit and method of operation thereof

Parallel redundant single-electron device and method of manufacture

Local oscillator with non-harmonic ratio between oscillator and RF frequencies using XOR operation

Local oscillator with non-harmonic ratio between oscillator and RF frequencies using pulse generation and selection

Local oscillator with non-harmonic ratio between oscillator and RF frequencies using XOR operation with jitter estimation and correction

Single-electron tunnel junction for complementary metal-oxide device and method of manufacturing the same

Fast hopping frequency synthesizer using an all digital phased locked loop (ADPLL)

Hybrid stochastic gradient based digitally controlled oscillator gain Kestimation

Local oscillator incorporating phase command exception handling utilizing a quadrature switch

Linearization of a transmit amplifier

DELAY ALIGNMENT IN A CLOSED LOOP TWO-POINT MODULATION ALL DIGITAL PHASE LOCKED LOOP

Precise delay alignment between amplitude and phase/frequency modulation paths in a digital polar transmitter

Harmonic characterization and correction of device mismatch

Frequency tuning range extension and modulation resolution enhancement of a digitally controlled oscillator

Built-in self test method for a digitally controlled crystal oscillator

Method of defining semiconductor fabrication process utilizing transistor inverter delay period

Removing close-in interferers through a feedback loop

Gain calibration of a digital controlled oscillator

Gain normalization of a digitally controlled oscillator in an all digital phase locked loop based transmitter

Continuous reversible gear shifting mechanism

Apparatus and method for acquisition and tracking bank cooperation in a digitally controlled oscillator

All digital phase locked loop architecture for low power cellular applications

Negative contributive offset compensation in a transmit buffer utilizing inverse clocking

Method and apparatus for a fully digital quadrature modulator

Type-II all-digital phase-locked loop (PLL)

Type-II all-digital phase-locked loop (PLL)

Fast hopping frequency synthesizer using an all digital phased locked loop (ADPLL)

Technique for improving antialiasing and adjacent channel interference filtering using cascaded passive IIR filter stages combined with direct sampling and mixing

Method and architecture for controlling asymmetry of an LMS adaptation algorithm that controls FIR filter coefficients

Removing close-in interferers through a feedback loop

Transmitter for wireless applications incorporation spectral emission shaping sigma delta modulator

Sigma-delta (ΣΔ) analog-to-digital converter (ADC) structure incorporating a direct sampling mixer

Circuit for high-resolution phase detection in a digital RF processor

Efficient charge transfer using a switched capacitor resistor

Frequency synthesizer with phase restart

Hybrid polar/cartesian digital modulator

Oscillator system, method of providing a resonating signal and a communications system employing the same

Gain calibration of a digital controlled oscillator

Low noise high isolation transmit buffer gain control mechanism

Method and apparatus for digital amplitude and phase modulation

Efficient pulse amplitude modulation transmit modulation

Multi-tap, digital-pulse-driven mixer

Image reject filtering in a direct sampling mixer

Wireless communications device having type-II all-digital phase-locked loop (PLL)

Method and apparatus for crystal drift compensation

Apparatus for and method of noise suppression and dithering to improve resolution quality in a digital RF processor

Efficient pulse amplitude modulation transmit modulation

Technique for improving antialiasing and adjacent channel interference filtering using cascaded passive IIR filter stages combined with direct sampling and mixing

Method of rate conversion together with I-Q mismatch correction and sampler phase adjustment in direct sampling based down-conversion

Active removal of aliasing frequencies in a decimating structure by changing a decimation ratio in time and space

Digital PLL with gear shift

Active removal of aliasing frequencies in a decimating structure by changing a decimation ratio in time and space

Active removal of aliasing frequencies in a decimating structure by changing a decimation ratio in time and space

Active removal of aliasing frequencies in a decimating structure by changing a decimation ratio in time and space