Hai-Ching Chen

SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF

METHOD OF SELECTIVE FILM DEPOSITION AND SEMICONDUCTOR FEATURE MADE BY THE METHOD

INTERCONNECT STRUCTURE AND METHOD FOR FORMING THE SAME

THIN FILM TRANSISTOR INCLUDING A COMPOSITIONALLY-MODULATED ACTIVE REGION AND METHODS FOR FORMING THE SAME

SELECTIVE DEPOSITION FOR INTEGRATED CIRCUIT INTERCONNECT STRUCTURES

SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF

SEMICONDUCTOR DEVICE INCLUDING A BLOCKING LAYER

SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURE

Annealed seed layer to improve ferroelectric properties of memory layer

SEMICONDUCTOR DEVICE, METHOD OF MANUFACTURING OXIDE FILM AND METHOD FOR SUPPRESSING GENERATION OF LEAKAGE CURRENT

INTERCONNECT STRUCUTRE WITH PROTECTIVE ETCH-STOP

Method of fabricating transistor structure

FERROELECTRIC MEMORY DEVICE AND METHOD OF FORMING THE SAME

SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF

3D LATERAL PATTERNING VIA SELECTIVE DEPOSITION FOR FERROELECTRIC DEVICES

MEMORY DEVICE AND METHOD FOR FORMING A MEMORY DEVICE

NOVEL SELF-ALIGN VIA STRUCTURE BY SELECTIVE DEPOSITION

Semiconductor device and manufacturing method thereof

DOUBLE GATE FERROELECTRIC FIELD EFFECT TRANSISTOR DEVICES AND METHODS FOR FORMING THE SAME

Cocktail layer over gate dielectric layer of FET FeRAM

THIN FILM TRANSISTOR INCLUDING A COMPOSITIONALLY-MODULATED ACTIVE REGION AND METHODS FOR FORMING THE SAME

FERROELECTRIC MEMORY DEVICES HAVING IMPROVED FERROELECTRIC PROPERTIES AND METHODS OF MAKING THE SAME

Dielectric capping structure overlying a conductive structure to increase stability

Organic gate TFT-type stress sensors and method of making and using the same

Stacked ferroelectric structure

THIN FILM TRANSISTOR INCLUDING A COMPOSITIONALLY-GRADED GATE DIELECTRIC AND METHODS FOR FORMING THE SAME

Graphene-assisted low-resistance interconnect structures and methods of formation thereof

Method of providing a workpiece including low resistance interconnect low-resistance interconnect

Capping layer over FET FeRAM to increase charge mobility

Porogen bonded gap filling material in semiconductor manufacturing

Ferroelectric memory device, manufacturing method of the ferroelectric memory device and semiconductor chip

Semiconductor devices with ferroelectric layer and methods of manufacturing thereof

System and method of forming a porous low-k structure

Method of selective film deposition and semiconductor feature made by the method

Double gate metal-ferroelectric-metal-insulator-semiconductor field-effect transistor (MFMIS-FET) structure

Ferroelectric field effect transistor devices and methods for forming the same

Metal layers for increasing polarization of ferroelectric memory device

In-situ thermal annealing of electrode to form seed layer for improving FeRAM performance

Metal capping layer and methods thereof

Stacked ferroelectric structure

Semiconductor devices with ferroelectric layer and methods of manufacturing thereof

PASSIVATION STRUCTURE FOR A THIN FILM TRANSISTOR

Ferroelectric memory device with a metal layer having a crystal orientation for improving ferroelectric polarization and method for forming the ferroelectric memory device

Carrier modification devices for avoiding channel length reduction and methods for fabricating the same

Ferroelectric field effect transistor devices and methods for forming the same

Annealed seed layer to improve ferroelectric properties of memory layer

Carrier barrier layer for tuning a threshold voltage of a ferroelectric memory device

Method for forming semiconductor structure

Method of selective film deposition and semiconductor feature made by the method

Cocktail layer over gate dielectric layer of FET FeRAM

Organic gate TFT-type stress sensors and method of making and using the same

Double gate ferroelectric field effect transistor devices and methods for forming the same

Transistor including an active region and methods for forming the same

Semiconductor structure and method for forming the same

Thin film transistor including a compositionally-modulated active region and methods for forming the same

Interconnect structures including air gaps

Method and structure for semiconductor device having gate spacer protection layer

Capping layer overlying dielectric structure to increase reliability

Interconnect strucutre with protective etch-stop

Carrier barrier layer for tuning a threshold voltage of a ferroelectric memory device

Ferroelectric memory device, manufacturing method of the ferroelectric memory device and semiconductor chip

Self-aligned via structure by selective deposition

Selective deposition for integrated circuit interconnect structures

Thin film transistor including a compositionally-modulated active region and methods for forming the same

Annealed seed layer to improve ferroelectric properties of memory layer

Stacked ferroelectric structure

Thin film transistor including a dielectric diffusion barrier and methods for forming the same

Thin film transistor including a compositionally-graded gate dielectric and methods for forming the same

Capping layer over FET FeRAM to increase charge mobility

Cocktail layer over gate dielectric layer of FET FeRAM

Dielectric capping structure overlying a conductive structure to increase stability

Metal oxide composite as etch stop layer

Semiconductor devices with air gate spacer and air gate cap

Selective deposition of barrier layer

Memory device and method for fabricating the same

Interconnect structure

Interconnect structure

Semiconductor device comprising cap layer over dielectric layer and method of manufacture

Graphene-assisted low-resistance interconnect structures and methods of formation thereof

Metal capping layer and methods thereof

Semiconductor devices with air gate spacer and air gate cap

Interconnect strucutre with protective etch-stop

Using a self-assembly layer to facilitate selective formation of an etching stop layer

Selective deposition of barrier layer

Structure and method for interconnection with self-alignment

Method for manufacturing interconnect structures including air gaps

Capping layer overlying dielectric structure to increase reliability

Dielectric capping structure overlying a conductive structure to increase stability

Semiconductor structure including low-resistance interconnect and integrated circuit device having the same

Semiconductor device and manufacturing method thereof

Method and structure for semiconductor device having gate spacer protection layer

Porogen bonded gap filling material in semiconductor manufacturing

Method and apparatus for forming self-aligned via with selectively deposited etching stop layer

Graphene-assisted low-resistance interconnect structures and methods of formation thereof

Interconnect structure and method for forming the same

Interconnect structure and method for forming the same

Semiconductor device comprising etch stop layer over dielectric layer and method of manufacture

Methods for fabricating a low-resistance interconnect

System and method of forming a porous low-k structure

Selective deposition for integrated circuit interconnect structures