Thomas Werner

Restricted stress regions formed in the contact level of a semiconductor device

Method and Semiconductor Device Comprising a Protection Layer for Reducing Stress Relaxation in a Dual Stress Liner Approach

SELF-ALIGNED CONTACT STRUCTURE LATERALLY ENCLOSED BY AN ISOLATION STRUCTURE OF A SEMICONDUCTOR DEVICE

Method for making semiconductor device comprising replacement gate electrode structures with an enhanced diffusion barrier

RESTRICTED STRESS REGIONS FORMED IN THE CONTACT LEVEL OF A SEMICONDUCTOR DEVICE

REDUCTION OF METAL SILICIDE DIFFUSION IN A SEMICONDUCTOR DEVICE BY PROTECTING SIDEWALLS OF AN ACTIVE REGION

Semiconductor device comprising a capacitor in the metallization system and a method of forming the capacitor

SELF-ALIGNED CONTACT STRUCTURE IN A SEMICONDUCTOR DEVICE

Method and a semiconductor device comprising a protection layer for reducing stress relaxation in a dual stress liner approach

Method and test structure for estimating focus settings in a lithography process based on CD measurements

SYSTEM AND METHOD FOR REDUCING COLLATERAL TRANSPORT-INDUCED DAMAGE DURING MICROSTRUCTURE PROCESSING

Test structure for OPC-related shorts between lines in a semiconductor device

Method for reducing resist poisoning during patterning of stressed nitrogen-containing layers in a semiconductor device

Field effect transistor having a stressed contact etch stop layer with reduced conformality

Test structure for determining characteristics of semiconductor alloys in SOI transistors by x-ray diffraction

METHOD FOR INCREASING THE PLANARITY OF A SURFACE TOPOGRAPHY IN A MICROSTRUCTURE

Technique for forming an isolation trench as a stress source for strain engineering

Semiconductor device comprising a contact structure based on copper and tungsten

Technique for enhancing process flexibility during the formation of vias and trenches in low-k interlayer dielectrics