Georgetown, Texas
United States
25
2020-03-12
The entities that hold a legal rights for patent applications filed by inventor Lais Eric N.:
Eric N. Lais from Georgetown, US has applied for patents for these inventions. The list has both pending applications and granted patents:
Peripheral component interconnect express (PCIE) network with input/output (I/O) operation chaining to reduce communication time within execution of I/O channel operations
#2 | 2020-01-02Peripheral component interconnect express (PCIE) network with input/output (I/O) chaining to reduce communication time within execution of I/O channel operations
#3 | 2018-12-27INPUT/OUTPUT COMPUTER SYSTEM INCLUDING HARDWARE ASSISTED AUTOPURGE OF CACHE ENTRIES ASSOCIATED WITH PCI ADDRESS TRANSLATIONS
#4 | 2018-12-20Management of data transaction from I/O devices
#5 | 2018-12-20Management of data transaction from I/O devices
#6 | 2018-12-13Transmission of a message based on a determined cognitive context
#7 | 2018-07-19INPUT/OUTPUT COMPUTER SYSTEM INCLUDING HARDWARE ASSISTED AUTOPURGE OF CACHE ENTRIES ASSOCIATED WITH PCI ADDRESS TRANSLATIONS
#8 | 2018-04-05Maintaining cyclic redundancy check context in a synchronous I/O endpoint device cache system
#9 | 2018-03-29Multi-packet processing with ordering rule enforcement
#10 | 2018-03-29Cut-through buffer with variable frequencies
#11 | 2018-01-04Computer system including synchronous input/output and hardware assisted purge of address translation cache entries of synchronous input/output transactions
#12 | 2017-12-28Synchronous input / output hardware acknowledgement of write completions
#13 | 2017-12-28Input/output computer system including hardware assisted autopurge of cache entries associated with PCI address translations
#14 | 2017-12-28Synchronous input/output (I/O) cache line padding
#15 | 2017-11-09Synchronous input/output computer system including hardware invalidation of synchronous input/output context
#16 | 2017-11-02HARDWARE-ASSISTED PROTECTION FOR SYNCHRONOUS INPUT/OUTPUT
#17 | 2017-11-02HARDWARE-ASSISTED PROTECTION FOR SYNCHRONOUS INPUT/OUTPUT
#18 | 2017-11-02HARDWARE-ASSISTED PROTECTION FOR SYNCHRONOUS INPUT/OUTPUT
#19 | 2017-09-12Multi-packet processing with ordering rule enforcement
#20 | 2017-04-06Error detection and recovery for synchronous input/output operations
#21 | 2017-04-06Error detection and recovery for synchronous input/output operations
#22 | 2017-03-09Peripheral component interconnect express (PCIE) pseudo-virtual channels using vendor defined messages
#23 | 2017-03-09Peripheral component interconnect express (PCIE) pseudo-virtual channels using vendor defined messages
#24 | 2017-01-19Flexible I/O DMA address allocation in virtualized systems
#25 | 2016-11-01Peripheral component interconnect express (PCIE) pseudo-virtual channels and non-blocking writes
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