Inventor profile of:

Nir Jacob Wakrat

City:

Los Altos, California

Country:

United States

Published Applications:

43

Last publication date:

2017-10-05

Top Assignees for applications by Nir Jacob Wakrat

The entities that hold a legal rights for patent applications filed by inventor Wakrat Nir Jacob:

Recent patent applications by Wakrat Nir Jacob

Nir Jacob Wakrat from Los Altos, US has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2017-10-05
US20170286290A1
Physics

Efficient buffering for a system having non-volatile memory

#2 | 2017-04-13
US20170102899A1
Physics

DATA PARTITIONING SCHEME FOR NON-VOLATILE MEMORIES

#3 | 2016-03-31
US20160092110A1
Physics

Systems and methods for configuring non-volatile memory

#4 | 2015-10-29
US20150309928A1
Physics

Metadata redundancy schemes for non-volatile memories

#5 | 2015-10-22
US20150301938A1
Physics

LBA bitmap usage

#6 | 2014-10-02
US20140297935A1
Physics

Mount-time reconciliation of data availability

#7 | 2014-09-18
US20140281588A1
Electricity

Generating efficient reads for a system having non-volatile memory

#8 | 2014-09-18
US20140281176A1
Physics

Accessing metadata with an external host

#9 | 2014-09-18
US20140281136A1
Physics

Systems and methods for writing to high-capacity memory

#10 | 2014-06-12
US20140164717A1
Physics

Systems and methods for improved communications in a nonvolatile memory system

#11 | 2014-05-15
US20140136771A1
Physics

Initiating memory wear leveling

#12 | 2014-03-18
US13032073
-

Initiating memory wear leveling

#13 | 2014-01-16
US20140019673A1
Physics

Dynamically allocating number of bits per cell for memory locations of a non-volatile memory

#14 | 2013-12-05
US20130326113A1
Physics

USAGE OF A FLAG BIT TO SUPPRESS DATA TRANSFER IN A MASS STORAGE SYSTEM HAVING NON-VOLATILE MEMORY

#15 | 2013-10-31
US20130290606A1
Physics

POWER MANAGEMENT FOR A SYSTEM HAVING NON-VOLATILE MEMORY

#16 | 2013-10-24
US20130283081A1
Physics

Method of selective power cycling of components in a memory device independently by turning off power to a memory array or memory controller

#17 | 2013-08-15
US20130212318A1
Physics

Architecture for address mapping of managed non-volatile memory

#18 | 2013-06-13
US20130151830A1
Physics

Mount-time reconciliation of data availability

#19 | 2013-06-13
US20130151754A1
Physics

LBA bitmap usage

#20 | 2013-05-30
US20130138868A1
Physics

Systems and methods for improved communications in a nonvolatile memory system

#21 | 2013-05-23
US20130132653A1
Physics

DATA PARTITIONING SCHEME FOR NON-VOLATILE MEMORIES

#22 | 2013-05-02
US20130111298A1
Physics

Systems and methods for obtaining and using nonvolatile memory health information

#23 | 2013-03-21
US20130073800A1
Physics

Multipage preparation commands for non-volatile memory systems

#24 | 2013-03-21
US20130073789A1
Physics

Systems and methods for configuring non-volatile memory

#25 | 2013-03-21
US20130073788A1
Physics

Weave sequence counter for non-volatile memory systems

#26 | 2013-02-07
US20130036255A1
Physics

TESTING MEMORY SUBSYSTEM CONNECTIVITY

#27 | 2013-02-07
US20130036254A1
Physics

Debugging a memory subsystem

#28 | 2013-01-03
US20130007562A1
Physics

Controller interface providing improved data reliability

#29 | 2013-01-03
US20130007348A1
Physics

Booting Raw Memory from a Host

#30 | 2013-01-03
US20130007347A1
Physics

Booting a memory device from a host

#31 | 2013-01-03
US20130007333A1
Physics

Controller interface providing improved signal integrity

#32 | 2012-08-23
US20120216079A1
Physics

Obtaining debug information from a flash memory device

#33 | 2012-03-22
US20120072807A1
Physics

Updating error correction codes for data blocks

#34 | 2011-06-23
US20110154163A1
Physics

Accessing metadata with an external host

#35 | 2011-03-17
US20110066869A1
Physics

Method of selective power cycling of components in a memory device independently by reducing power to a memory array or memory controller

#36 | 2011-03-17
US20110066789A1
Physics

File system derived metadata for management of non-volatile memory

#37 | 2011-01-27
US20110022819A1
Physics

Index cache tree

#38 | 2011-01-27
US20110022781A1
Physics

Controller for optimizing throughput of read operations

#39 | 2011-01-27
US20110022780A1
Physics

Restore index page

#40 | 2010-11-11
US20100287446A1
Physics

Low latency read operation for managed non-volatile memory

#41 | 2010-11-11
US20100287353A1
Physics

Multipage preparation commands for non-volatile memory systems

#42 | 2010-11-11
US20100287329A1
Physics

Partial Page Operations for Non-Volatile Memory Systems

#43 | 2010-06-24
US20100161886A1
Physics

Architecture for address mapping of managed non-volatile memory

InventorID:

17984 ⎘