Campbell, California
United States
116
2026-01-08
The entities that hold a legal rights for patent applications filed by inventor Gonion Jeffry E.:
Jeffry E. Gonion from Campbell, US has applied for patents for these inventions. The list has both pending applications and granted patents:
INDIRECT BRANCH PREDICTOR SECURITY PROTECTION
#2 | 2025-09-18PC-Based Memory Permissions
#3 | 2023-12-28PC-based instruction group permissions
#4 | 2023-12-28PC-based memory permissions
#5 | 2023-04-27Hashing with soft memory folding
#6 | 2023-02-23Scalable system on a chip
#7 | 2023-01-12INDIRECT BRANCH PREDICTOR SECURITY PROTECTION
#8 | 2022-10-27Hashing with soft memory folding
#9 | 2022-10-13Branch predictor storing encrypted information
#10 | 2021-03-04Unified address translation
#11 | 2020-11-10Return-oriented programming (ROP)/jump oriented programming (JOP) attack protection
#12 | 2020-11-10Computation engine with extract instructions to minimize memory access
#13 | 2020-11-05Computation engine that operates in matrix and vector modes
#14 | 2020-08-27Matrix computation engine
#15 | 2020-07-30Range Mapping of Input Operands for Transcendental Functions
#16 | 2020-07-16Computation engine with strided dot product
#17 | 2020-06-18Indirect branch predictor security protection
#18 | 2020-06-18Indirect branch predictor storing encrypted branch information fields and security tag for security protection
#19 | 2020-01-30Computation engine that operates in matrix and vector modes
#20 | 2019-10-10Computation engine with strided dot product
#21 | 2019-10-10Computation engine with upsize/interleave and downsize/deinterleave options
#22 | 2019-09-26Systems and methods for performing memory compression
#23 | 2019-09-26Matrix computation engine
#24 | 2019-09-10Return-oriented programming (ROP)/jump oriented programming (JOP) attack protection
#25 | 2019-08-15Range Mapping of Input Operands for Transcendental Functions
#26 | 2019-05-02Matrix computation engine
#27 | 2019-04-30Cryptographic signatures for capability-based addressing
#28 | 2019-01-31Systems and methods for performing memory compression
#29 | 2018-05-03Fused Multiply-Add that Accepts Sources at a First Precision and Generates Results at a Second Precision
#30 | 2018-03-15Outer Product Engine
#31 | 2017-01-26Marking valid return targets
#32 | 2016-09-01Concurrent execution of heterogeneous vector instructions
#33 | 2016-03-31Conditional Termination and Conditional Termination Predicate Instructions
#34 | 2016-03-31Conditional stop instruction with accurate dependency detection
#35 | 2016-03-31Compare Break Instructions
#36 | 2015-08-13Completion time prediction for vector instructions
#37 | 2015-08-13Completion time determination for vector instructions
#38 | 2015-06-25Predicated vector hazard check instruction
#39 | 2015-03-26Dynamic attribute inference
#40 | 2015-03-26Early issue of null-predicated operations
#41 | 2015-03-26Predicate attribute tracker
#42 | 2015-03-26Predicate Vector Pack and Unpack Instructions
#43 | 2015-03-26Vector hazard check instruction with reduced source operands
#44 | 2015-03-26Hazard check instructions for enhanced predicate vector operations
#45 | 2015-02-26Auto multi-threading in macroscalar compilers
#46 | 2014-12-04Increasing macroscalar instruction level parallelism
#47 | 2014-11-06Memory controller mapping on-the-fly
#48 | 2014-10-30Memory controller mapping on-the-fly
#49 | 2014-09-25ENHANCED VECTOR TRUE/FALSE PREDICATE-GENERATING INSTRUCTIONS
#50 | 2014-09-25ENHANCED MACROSCALAR VECTOR OPERATIONS
#51 | 2014-09-25ENHANCED MACROSCALAR COMPARISON OPERATIONS
#52 | 2014-09-25Enhanced Macroscalar predicate operations
#53 | 2014-09-25Enhanced predicate registers having predicates corresponding to element widths
#54 | 2014-02-27Mechanism for performing speculative predicated instructions
#55 | 2014-01-23Prediction optimizations for Macroscalar vector partitioning loops
#56 | 2013-11-28BRANCH MISPREDICTION BEHAVIOR SUPPRESSION USING A BRANCH OPTIONAL INSTRUCTION
#57 | 2013-11-28Macroscalar vector prefetch with streaming access detection
#58 | 2013-10-03Selective suppression of branch prediction in vector partitioning loops until dependency vector is available for predicate generating instruction
#59 | 2013-08-29Branch misprediction behavior suppression on zero predicate branch mispredict
#60 | 2013-05-02Running shift for divide instructions for processing vectors
#61 | 2013-02-07Processing vectors using wrapping minima and maxima instructions in the macroscalar architecture
#62 | 2013-01-24Processing vectors using wrapping propagate instructions in the macroscalar architecture
#63 | 2013-01-24Processing vectors using wrapping negation instructions in the macroscalar architecture
#64 | 2013-01-24Processing vectors using wrapping multiply and divide instructions in the macroscalar architecture
#65 | 2013-01-24Processing vectors using wrapping shift instructions in the macroscalar architecture
#66 | 2013-01-24Processing vectors using wrapping boolean instructions in the macroscalar architecture
#67 | 2013-01-24Processing vectors using wrapping increment and decrement instructions in the macroscalar architecture
#68 | 2013-01-24Processing vectors using a wrapping rotate previous instruction in the macroscalar architecture
#69 | 2013-01-03Processing vectors using wrapping add and subtract instructions in the macroscalar architecture
#70 | 2012-12-27Scalar readXF instruction for processing vectors
#71 | 2012-12-13Non-faulting and first faulting instructions for processing vectors
#72 | 2012-11-08Read XF instruction for processing vectors
#73 | 2012-09-20Instruction for comparing active vector elements to preceding active elements to determine value differences
#74 | 2012-09-20CONDITIONAL EXTRACT INSTRUCTION FOR PROCESSING VECTORS
#75 | 2012-09-13Confirm instruction for processing vectors
#76 | 2012-08-30Running multiply-accumulate instructions for processing vectors
#77 | 2012-08-16Running unary operation instructions for processing vectors
#78 | 2012-07-26Sharing a fault-status register when processing vector instructions
#79 | 2012-07-26Predicting a result for an actual instruction when processing vector instructions
#80 | 2012-07-26Predicting a result for a predicate-generating instruction when processing vector instructions
#81 | 2012-07-26Predicting a result of a dependency-checking instruction when processing vector instructions
#82 | 2012-07-26Predicting a pattern in addresses for a memory-accessing instruction when processing vector instructions
#83 | 2012-06-28Predicting branches for vector partitioning loops when processing vector instructions
#84 | 2012-04-26Predicate count and segment count instructions for processing vectors
#85 | 2012-03-29Systems and methods for compiler-based vectorization of non-leaf code
#86 | 2012-03-29Systems and methods for compiler-based full-function vectorization
#87 | 2012-03-08Vector index instruction for generating a result vector with incremental values based on a start value and an increment value
#88 | 2011-12-29Using addresses to detect overlapping memory regions
#89 | 2011-12-29Page fault prediction for processing vector instructions
#90 | 2011-11-17GETFIRST AND ASSIGNLAST INSTRUCTIONS FOR PROCESSING VECTORS
#91 | 2011-11-10Running subtract and running divide instructions for processing vectors
#92 | 2011-05-12Generate predicates instruction for processing vectors
#93 | 2011-04-21Vector processing with predicate vector for setting element values based on key element position by executing remaining instruction
#94 | 2011-02-10SELECT FIRST AND SELECT LAST INSTRUCTIONS FOR PROCESSING VECTORS
#95 | 2011-02-10Actual instruction and actual-fault instructions for processing vectors
#96 | 2010-12-23Non-faulting and first-faulting instructions for processing vectors
#97 | 2010-12-23VECTOR TEST INSTRUCTION FOR PROCESSING VECTORS
#98 | 2010-12-23Running-min and running-max instructions for processing vectors using a base value from a key element of an input vector
#99 | 2010-04-01Method and apparatus for compressing and decompressing data
#100 | 2010-04-01Method and apparatus for compressing and decompressing data
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