Michael B. McShane

Die stack address bus having a programmable width

Defective die replacement in a die stack

Microelectronic assembly having a heat spreader for a plurality of die

Thin low profile strip dual in-line memory module

Wirebond recess for stacked die

Stacked semiconductor devices

Edge coupling of semiconductor dies

Using an integrated circuit die configuration for package height reduction

Optical wafer and die probe testing

Die stack with optical TSVs

Optical die test interface with separate voltages for adjacent electrodes

Optical redundancy

Optical backplane mirror

Integration of a MEMS beam with optical waveguide and deflection in two dimensions

Communication system die stack

Gate security feature

Microelectronic assembly having a heat spreader for a plurality of die

Techniques for reducing inductance in through-die vias of an electronic assembly

Methods and structures for reducing heat exposure of thermally sensitive semiconductor devices

Methods and structures for reducing heat exposure of thermally sensitive semiconductor devices

Semiconductor devices with nonconductive vias

Stacked semiconductor devices

Stacked semiconductor die with continuous conductive vias

Package-to-package stacking by using interposer with traces, and or standoffs and solder balls

Semiconductor device package

Edge mounted integrated circuits with heat sink

TECHNIQUE FOR PACKAGING MULTIPLE INTEGRATED CIRCUITS

High bandwidth cache-to-processing unit communication in a multiple processor/cache system