Inventor profile of:

Marc Alan Mangrum

City:

Manchaca, Texas

Country:

United States

Published Applications:

21

Last publication date:

2023-11-16

Top Assignees for applications by Marc Alan Mangrum

The entities that hold a legal rights for patent applications filed by inventor Mangrum Marc Alan:

Recent patent applications by Mangrum Marc Alan

Marc Alan Mangrum from Manchaca, US has applied for patents for these inventions. The list has both pending applications and granted patents:

#1 | 2023-11-16
US20230369182A1
Electricity

FLIP CHIP SELF-ALIGNMENT FEATURES FOR SUBSTRATE AND LEADFRAME APPLICATIONS

#2 | 2023-10-19
US20230335883A1
Electricity

Packaged electronic device having integrated antenna and locking structure

#3 | 2021-08-26
US20210265247A1
Electricity

Flip chip curved sidewall self-alignment features for substrate and method for manufacturing the self-alignment features

#4 | 2021-05-20
US20210151854A1
Electricity

Packaged electronic device having integrated antenna and locking structure

#5 | 2020-05-14
US20200153082A1
Electricity

Packaged electronic device having integrated antenna and locking structure

#6 | 2019-04-25
US20190122964A1
Electricity

Semiconductor package having inspection structure and related methods

#7 | 2019-02-07
US20190043789A1
Electricity

Flip chip self-alignment features for substrate and leadframe applications

#8 | 2018-12-27
US20180374800A1
Electricity

Embedded vibration management system having an array of vibration absorbing structures

#9 | 2018-12-06
US20180350726A1
Electricity

Semiconductor package having inspection structure and related methods

#10 | 2018-07-24
US14264027
Electricity

Flip chip self-alignment features for substrate and leadframe applications

#11 | 2018-07-24
US14069814
Electricity

Embedded vibration management system

#12 | 2018-07-05
US20180191055A1
Electricity

Packaged electronic device having integrated antenna and locking structure

#13 | 2018-01-11
US20180012829A1
Electricity

Semiconductor package with clip alignment notch

#14 | 2017-10-26
US20170309554A1
Electricity

Method of forming a semiconductor package with conductive interconnect frame and structure

#15 | 2017-05-04
US20170125881A1
Electricity

Packaged electronic device having integrated antenna and locking structure

#16 | 2016-06-07
US13356349
Electricity

Shielding technique for semiconductor package including metal lid

#17 | 2015-10-06
US13356330
Electricity

Shielding technique for semiconductor package including metal lid and metalized contact area

#18 | 2008-06-19
US20080142960A1
Electricity

Circuit device with at least partial packaging and method for forming

#19 | 2006-01-19
US20060012036A1
Electricity

Circuit device with at least partial packaging and method for forming

#20 | 2005-07-26
US10418790
-

Circuit device with at least partial packaging, exposed active surface and a voltage reference plane

#21 | 2005-01-04
US10418763
-

Circuit device with at least partial packaging and method for forming

InventorID:

1867981 ⎘