John A. SCHUMANN

UN-MARK INSTRUCTIONS ON AN INSTRUCTION MATCH TO REDUCE RESOURCES REQUIRED TO MATCH A GROUP OF INSTRUCTIONS

Method for latency detection on a hardware simulation accelerator

Dynamic modification of instructions that do not modify the architectural state of a processor

Software-invisible interrupt for a microprocessor

Obscuring information in virtualization environment

Identifying translation errors

Address translation cache invalidation in a microprocessor

Address translation cache invalidation in a microprocessor

Generating and adding additional control information to logic under test to facilitate debugging and comprehension of a simulation

Method and system for detection of thread stall

System and method including broadcasting an address translation invalidation instruction with a return marker to indentify the location of data in a computing system having mutiple processors

Performance benchmark generation

Processor performance monitor that logs reasons for reservation loss

Precise verification of a logic problem on a simulation accelerator

Method and system for detection of thread stall

Driving pervasive commands using breakpoints in a hardware-accelerated simulation environment

Circuit design verification in a hardware accelerated simulation environment using breakpoints

Processor performance monitor that logs reasons for reservation loss

Driving pervasive commands using breakpoints in a hardware-accelerated simulation environment

Testing a non-core MMU

Testing a non-core MMU

Circuit design verification in a hardware accelerated simulation environment using breakpoints