Florent BEGON

Methods and apparatus for predicting instructions for execution

Methods and apparatus for monitoring prefetcher accuracy information using a prefetch flag independently accessible from prefetch tag information

Increasing effective cache associativity

Handling move instructions via register renaming or writing to a different physical register using control flags

Apparatus and method for predicting target storage unit

Error handling mechanism for a tag memory within coherency control circuitry

Checkpointing long latency instruction as fake branch in branch prediction mechanism

Control of clock gating

Cache eviction

Suppressing register renaming for conditional instructions predicted as not executed

Cache circuitry, data processing apparatus and method for handling write access requests

Data processing apparatus and method for converting data values between endian formats

Marking registers as available for register renaming

Determining register availability for register renaming

Speculative data value usage

Method for renaming a large number of registers in a data processing system using a background channel

Restoring a register renaming table within a processor following an exception

Handling data processing requests

Cache eviction

Line fill techniques

Store buffer capable of maintaining associated cache information

Variable size cache memory support within an integrated circuit